电子科技大学：《集成电路可测性设计 VLSIDesign》课程教学资源（课件讲稿）第10章 电流测试

●●●● ●●o ● ● 第十章电流测试 2

2 第十章 电流测试

●●● 8888o ●●●● ●●●● 本章要点 ●●●● ●●o● ●lbDa的定义 ●lbDa测试原理 ●lbDa可检测的故障 3

3 本章要点  IDDQ的定义  IDDQ测试原理  IDDQ可检测的故障

●● ●0 ● ●● 概述 ●●●● ●●●● Early 1990%s-Fabrication Line had 50 to 1000 defects per million (dpm)chips IBM wants to get 3.4 defects per million(dpm)chips (0 defects) Conventional way to reduce defects: Increasing test fault coverage Increasing burn-in coverage Increase Electro-Static Damage awareness New way to reduce defects: >IDo Testing-also useful for Failure Effect Analysis 4

4 概述  Early 1990’s – Fabrication Line had 50 to 1000 defects per million (dpm) chips  IBM wants to get 3.4 defects per million (dpm) chips (0 defects)  Conventional way to reduce defects:  Increasing test fault coverage  Increasing burn-in coverage  Increase Electro-Static Damage awareness  New way to reduce defects:  IDDQ Testing – also useful for Failure Effect Analysis

●●● ●● ●●0 ●● 1oa测试图形提高故障覆盖率 ●●● ●●0● ●●● ● 20% 5 100K-1M Iddg test (vectors) Functional and stuck-at test (vectors) 5

5 IDDQ测试图形提高故障覆盖率

●● bpa测试 ●●● 00 ●●0 ●●0● lDD---Current flow through VDD Q---Quiescent state IDDo Testing --Detecting faults by monitoring IDDQ 仝DD IDD Inputs CMOS Outputs circuit

IDDQ测试 IDD --- Current flow through VDD Q --- Quiescent state IDDQ Testing --- Detecting faults by monitoring IDDQ CMOS circuit Inputs Outputs VDD IDD