ON MT9P031:1/2.5-Inch 5 Mp Digital Ir ive Output Data Format(Default Mode) mGound Timing"on page 13. Dutput Data Figure 7:Spatial lllustration of Image Readout VALID IMAGE ANNCL 000000 -000000 88 000000 -000000 000000. -000000 VERTICAL BLANKING 9980808 890989 -g890g
MT9P031_DS Rev. J 5/15 EN 11 ©Semiconductor Components Industries, LLC,2015. MT9P031: 1/2.5-Inch 5 Mp Digital Image Sensor Pixel Data Format Output Data Format (Default Mode) The MT9P031 image data is read out in a progressive scan. Valid image data is surrounded by horizontal blanking and vertical blanking, as shown in Figure 7. LV is HIGH during the shaded region of the figure. FV timing is described in “Output Data Timing” on page 13. Figure 7: Spatial Illustration of Image Readout P0,0 P0,1 P0,2.P0,n-1 P0,n P1,0 P1,1 P1,2.P1,n-1 P1,n 00 00 00 . 00 00 00 00 00 00 . 00 00 00 Pm-1,0 Pm-1,1.Pm-1,n-1 Pm-1,n Pm,0 Pm,1.Pm,n-1 Pm,n 00 00 00 . 00 00 00 00 00 00 . 00 00 00 00 00 00 . 00 00 00 00 00 00 . 00 00 00 00 00 00 . 00 00 00 00 00 00 . 00 00 00 00 00 00 . 00 00 00 00 00 00 . 00 00 00 00 00 00 . 00 00 00 00 00 00 . 00 00 00 VALID IMAGE HORIZONTAL BLANKING VERTICAL BLANKING VERTICAL/HORIZONTAL BLANKING
ON Mw9Po31:1y2.5+nch5pDeaIDeBSenmiat Readout Sequence w is set to aregion in be given to how thesenso readsthe itsown purposes. Rows are read from the array in the following order: 1.Dark rows: hal_BLCiscle r,dar The Row_Skip setting is ignored for the dark row region. If Show dark rows is clear and manual blcis set.no dark r ead from the array as part of this step.allowing all rows to be part of the active image.This does not change the frame time,as HpR is included in the vertical blank period 2.Active image: Table 6: Dark Rows Sampled as a Function of Row_Bin Row_Bin HoR (Dark Rows After Binning) 3 opkeontourntheolowingoder If either Show_Dark Columns or Row_BLC is set,dark columns on the left side of the image are read out followed by those on the right side.The set of columns read is shown in Table 7. The Column_Skip setting is ignored for the dark columns If neither Show_Dark_Columns nor Row_BLC isset,no dark columns are read,allow ing all co e.This does not change the row time,as DC Is m The columns defined by column start,column size,bin,skip,and column mirror set- tings are read out.If this set of columns includes the columns read out above,these columns are resampled,meaning the data is invalid. Table 7: Dark Columns Sampled as a Function of Column_Bin Column_Bin Woc(Dark Columns After Binning) 0 80 40 3 20 M9r9n.5a155倒 2
MT9P031_DS Rev. J 5/15 EN 12 ©Semiconductor Components Industries, LLC,2015. MT9P031: 1/2.5-Inch 5 Mp Digital Image Sensor Pixel Data Format Readout Sequence Typically, the readout window is set to a region including only active pixels. The user has the option of reading out dark regions of the array, but if this is done, consideration must be given to how the sensor reads the dark regions for its own purposes. Rows are read from the array in the following order: 1. Dark rows: If Show_Dark_Rows is set, or if Manual_BLC is clear, dark rows on the top of the array are read out. The set of rows sampled are adjusted based on the Row_Bin setting such that there are 8 rows after binning, as shown in the Table 6. The Row_Skip setting is ignored for the dark row region. If Show_Dark_Rows is clear and Manual_BLC is set, no dark rows are read from the array as part of this step, allowing all rows to be part of the active image. This does not change the frame time, as HDR is included in the vertical blank period. 2. Active image: The rows defined by the row start, row size, bin, skip, and row mirror settings are read out. If this set of rows includes rows read out above, those rows are resampled, meaning that the data is invalid. Columns are read out in the following order: 1. Dark columns: If either Show_Dark_Columns or Row_BLC is set, dark columns on the left side of the image are read out followed by those on the right side. The set of columns read is shown in Table 7. The Column_Skip setting is ignored for the dark columns. If neither Show_Dark_Columns nor Row_BLC is set, no dark columns are read, allowing all columns to be part of the active image. This does not change the row time, as WDC is included in the vertical blank period. 2. Active image: The columns defined by column start, column size, bin, skip, and column mirror settings are read out. If this set of columns includes the columns read out above, these columns are resampled, meaning the data is invalid. Table 6: Dark Rows Sampled as a Function of Row_Bin Row_Bin HDR (Dark Rows After Binning) 0 8 1 8 3 8 Table 7: Dark Columns Sampled as a Function of Column_Bin Column_Bin WDC (Dark Columns After Binning) 0 80 1 40 3 20
ON MTP31:1/25-inch5 Output Data Timing doe ouo prous 1592 duces 1944 rows of 2592 columns each.Ih lockch thedat.Forach XCLKYee pixel dat d as a um ou puts on the DoUr pins.When both FV and LV are asserted,the pixel is valid.PIXCLK cycles that Figure 8:Default Pixel Output Timing PIXCLK 几几几几Π几几几几Π几几 V Dour[11:0] M呱23：：Yh☑ Vertical Blanking oriz Blanking Valid Image Data Horiz Blanking Vertical Blaning LVand FV The timing of the FVand LVoutputs is closely related to the row time and the frame time cappme efore the active image,and FV will be extended to include them.In this case, LV will be asse ed during the valid pixels of eacl y The leadi offset from the leading of F by 609 PIXCLKs.If Show Dark Columns is set.the dark columns will be output before the image pixels,and LV will be extended back to nclude them;in this case,the first pixel of th low LV Format Options The default situation is for LV to be negated when FV is negated.The other option avail- Contin
MT9P031_DS Rev. J 5/15 EN 13 ©Semiconductor Components Industries, LLC,2015. MT9P031: 1/2.5-Inch 5 Mp Digital Image Sensor Output Data Timing Output Data Timing The output images are divided into frames, which are further divided into lines. By default, the sensor produces 1944 rows of 2592 columns each. The FV and LV signals indicate the boundaries between frames and lines, respectively. PIXCLK can be used as a clock to latch the data. For each PIXCLK cycle, one 12-bit pixel datum outputs on the DOUT pins. When both FV and LV are asserted, the pixel is valid. PIXCLK cycles that occur when FV is negated are called vertical blanking. PIXCLK cycles that occur when only LV is negated are called horizontal blanking. Figure 8: Default Pixel Output Timing LV and FV The timing of the FV and LV outputs is closely related to the row time and the frame time. FV will be asserted for an integral number of row times, which will normally be equal to the height of the output image. If Show_Dark_Rows is set, the dark sample rows will be output before the active image, and FV will be extended to include them. In this case, FV’s leading edge happens at time 0. LV will be asserted during the valid pixels of each row. The leading edge of LV will be offset from the leading edge of FV by 609 PIXCLKs. If Show_Dark_Columns is set, the dark columns will be output before the image pixels, and LV will be extended back to include them; in this case, the first pixel of the active image still occurs at the same position relative to the leading edge of FV. Normally, LV will only be asserted if FV is asserted; this is configurable as described below. LV Format Options The default situation is for LV to be negated when FV is negated. The other option available is shown in Figure 9 on page 14. If Continuous_LV is set, LV is asserted even when FV is not, with the same period and duty cycle. If XOR_Line_Valid is set, but not Continuous_Line_Valid, the resulting LV will be the XOR of FV and the continuous LV. PIXCLK FV LV DOUT[11:0] P0 P1 P2 P3 P4 Pn Vertical Blanking Horiz Blanking Valid Image Data Horiz Blanking Vertical Blanking
MT9P031:1/2.5-Inch 5 Mp Digital Image Sensor Output Data Timing Figure 9:LV Format Options Default Continuous LV FV XOR LV The timing of an entire frame is shown in Figure 10. Figure 10:Frame Timing Column Readout Dark Rows 】Active Image MT3P0_05 te 14
MT9P031_DS Rev. J 5/15 EN 14 ©Semiconductor Components Industries, LLC,2015. MT9P031: 1/2.5-Inch 5 Mp Digital Image Sensor Output Data Timing Figure 9: LV Format Options The timing of an entire frame is shown in Figure 10. Figure 10: Frame Timing Default Continuous LV XOR LV FV LV FV LV FV LV LV Column Readout t ROW W Row Readout H FV tFRAME Blanking Region Active Image Dark Rows Dark Columns HDR WDC
ON Sem ON MTP31:1/25-inch5 Frame Time hepiel doc C ETCe nded tosampe pa om the am nd is ypicall sensor outputs data at the ma ximum rat equations in Table 8. Table8: Frame Time Parameter Name Equation fps Frame Rate 1/FRAME 14 FRAME Frame Time (H+max(VB,VBMIN))x ROW 71.66ms ROW Row Time 36.38u5 Output Image Width Skip+1 2592 PIXCLK H Output Image Height 944o6 Shutter Width 1943 rows HB Horizontal Blanking 1 PIXCLK Vertical anking Vertical Blank+1 26 rows HBMIN lankin 346×oMBn++64+wc/可 450 PIXCLK VBMIN Minimum Vertical max (8,SW-H)+1 Blanking 9 rows PIXCLK Pixclk Period 1/PIXCLK 10.42n5 zontal blanking(HBMIN)values for various Row_Bin and Table9: HBMIN Values for Row_bin vs.Column_bin Settings Column bin (WDC) 0 1 3 0 450 430 420 796 776 766 3 1488 1468 1458
MT9P031_DS Rev. J 5/15 EN 15 ©Semiconductor Components Industries, LLC,2015. MT9P031: 1/2.5-Inch 5 Mp Digital Image Sensor Output Data Timing Frame Time The pixel clock (PIXCLK) represents the time needed to sample 1 pixel from the array, and is typically equal to 1 EXTCLK period. The sensor outputs data at the maximum rate of 1 pixel per PIXCLK. One row time (t ROW) is the period from the first pixel output in a row to the first pixel output in the next row. The row time and frame time are defined by equations in Table 8. The minimum horizontal blanking (HBMIN) values for various Row_Bin and Column_Bin settings are shown in Table 9. Table 8: Frame Time Parameter Name Equation Default Timing at EXTCLK = 96 MHz fps Frame Rate 1/t FRAME 14 t FRAME Frame Time (H + max(VB, VBMIN)) × t ROW 71.66ms t ROW Row Time 2 × t PIXCLK x max(((W/2) + max(HB, HBMIN)), (41 + 346 x (Row_Bin+1) + 99)) 36.38s W Output Image Width 2 × ceil((Column_Size + 1) / (2 × (Column_Skip + 1))) 2592 PIXCLK H Output Image Height 2 × ceil((Row_Size + 1) / (2 × (Row_Skip + 1))) 1944 rows SW Shutter Width max (1, (2 * 16 × Shutter_Width_Upper) + Shutter_Width_Lower) 1943 rows HB Horizontal Blanking Horizontal_Blank + 1 1 PIXCLK VB Vertical Blanking Vertical_Blank + 1 26 rows HBMIN Minimum Horizontal Blanking 346 × (Row_Bin + 1) + 64 + (WDC / 2) 450 PIXCLK VBMIN Minimum Vertical Blanking max (8, SW - H) + 1 9 rows t PIXCLK Pixclk Period 1/f PIXCLK 10.42ns Table 9: HBMIN Values for Row_bin vs. Column_bin Settings Column_bin (WDC) Row_ bin 013 0 450 430 420 1 796 776 766 3 1488 1468 1458