Analysis and Design of Analog Integrated Circuits UQSTC MOST or bipolar amplifier Ve=4V/um,L=2.5um,VeL=10. MOST Ay= (Ves-V)/2 Av=100)fVEL≈1 o v and VGs-V≈o.2y Bipolar Ay= VE kT/q 3 vs 2 stages for 106 Ay≈1000)ifVE÷26 V since kT1g=26mv 9m= IcE VE kT/q IcE 2019/9/3 UESTC-Luo Ping 6
Analysis and Design of Analog Integrated Circuits 2019/9/3 UESTC – Luo Ping 6 VE=4V/um, L=2.5um, → VEL=10
Analysis and Design of Analog Integrated Circuits UQSTC Gain,Bandwidth and Gain-bandwidth Avo =gmTps Vout 1 BW= in 2元rDsCL GBW= 9m For all single-stage 2πCL Operational amplifiers The product of the low-frequency gain and the bandwidth is called the Gain- Bandwidth product---GBW. GBW depends on the transistor transconductance and the load capacitance, not on the output resistance. 2019/9/3 UESTC-Luo Ping
Analysis and Design of Analog Integrated Circuits 2019/9/3 UESTC – Luo Ping 7 The product of the low-frequency gain and the bandwidth is called the GainBandwidth product ---GBW. GBW depends on the transistor transconductance and the load capacitance, not on the output resistance
Analysis and Design of Analog Integrated Circuits UQSTC Bode diagram: Gain Av,BW and GBW Amplitude of the gain IAv It BW -20 dB/decade Avo=9mTDs GBW= 9m GBW 1 2πCL Phase of the gain φ(Av)f Avo 00 φ(Av)=.45o -90° at BW GBW is the product of Avo and the BW.At BW itself,the phase shift is-45. 2019/9/3 UESTC-Luo Ping 8
Analysis and Design of Analog Integrated Circuits 2019/9/3 UESTC – Luo Ping 8 Bode diagram: Amplitude of the gain Phase of the gain GBW is the product of AV0 and the BW. At BW itself, the phase shift is -45 °
Analysis and Design of Analog Integrated Circuits UOSTC Single-transistor amplifier Exercise GBW=100 MHz for CL=3 pF GBW= 9m 2元CL Techno.:K'n≈50AW2 Lmin=0.5μm gm=2mS Ips L?W? GBW.CL2 Ips FOM,Figure of Merit,.质量因素 's-'=0.2V 2Ips 8m=Vas-VI 三W/L=200 1-"2(s=02am1 L≈4×Lmin=2um 21 →W=400um 台W1L=200 2019/9/3 UESTC-Luo Ping 9
Analysis and Design of Analog Integrated Circuits 2019/9/3 UESTC – Luo Ping 9 2 m g mS 0.2 V V V GS T W L/ 200 min L L m 4 2 W m 400 2 ( ) 0.2 2 n ox D GS T W C I v V mA L W L/ 200 2 DS m GS T I g V V FOM Figure of Merit , ,质量因素
Analysis and Design of Analog Integrated Circuits Gain,Bandwidth and Gain-bandwidth No load capacitance, But a large input Avo=9m'Ds capacitance Ces Vout BW= 2n RsCGS Cos GBW= 、11 2n CGS Rs Rs WCox VGs-VT W?L?VGs-VT? BW is simple given by the RC product at the input. For high-frequency performance,it is not sufficient however to make fr large. The channel length does not seem to play a role,both W and Ves-V must be made small! 2019/9/3 UESTC-Luo Ping 10
Analysis and Design of Analog Integrated Circuits 2019/9/3 UESTC – Luo Ping 10 No load capacitance, But a large input capacitance CGS BW is simple given by the RC product at the input. For high-frequency performance, it is not sufficient however to make fT large. The channel length does not seem to play a role, both W and VGS-VT must be made small!