Section1.5 Software Aspects of Digital Design 11 PROGRAMMABLE Later in this book you'll learn how programmable logic devices(PLDs)and field- LOGIC DEVICES programmable gate arrays(FPGAs)allow you to design a circuit or subsystem by VERSUS writing a sort of program.PLDs and FPGAs are now available with up to millions of SIMULATION gates,and the capabilities of these technologies are ever increasing.If a PLD-or FPGA-based de n doesn't work the first time,you can often fix it by changing the the system level.The ease of prototypng and modifyng PLD-and FPGA-based systems can eliminate the need for simulation in board-level design;simulation is required only for chip-level designs. The most widely held view in industry trends savs that as chip technology advances.more and more design will be done at the chip level.rather than the board level.Therefore.the ability to perform complete and accurate simulation will become increasingly important to the typical digital designer However,another view is possible.If we extrapolate trends in PLD and FPGA capabilities.in the next decade we will witness the emergence of devices that include not only gates and flip-flops as building blocks,but also higher-level functions such as processors.memories.and input/output controllers.At this point,most digital designers will use complex on-chip components and interconnections whose basic functions have already been tested by the device manufacturer In this future view.it is still possible tomisapply high-level programmable functions,but it is also possible to fix mistakes simply by changing a program; detailed simulation ofa design before simply"trying it out"could be a waste oftime Another.compatible view is that the Pld or FPGA is merely a full-speed simulator for the program.and this full-speed simulator is what gets shipped in the product! Does this extreme view have any validity?Toguess the the following qu In any case modern digital systems are much too complex for a designer to have any chance of testing every possible input condition,with or without simula- tion.As in software,correct operation of digital systems is best accomplished through practices that ensure that the systems are"correct by design."It is a goal of this text to encourage such practices In addition to using the tools above,designers may sometimes write spe- cialized programs in high-evel languages in languages like PERL,to solve particular design problems.For example,Section 11.1 gives a few examples of C programs that generate the "truth tables"for complex combinational logic function Although CAD tools are important,they don't make or break a digital designer.To take an analogy from another field,you couldn't consider yourself to be a great writer just because you're a fast typist or very handy with a word processor.During your study of digital design,be sure to leamn and use all the Copyright 1999 by John F.Wakerly Copying Prohibited
Section 1.5 Software Aspects of Digital Design 11 DO NOT COPY DO NOT COPY DO NOT COPY DO NOT COPY DO NOT COPY DO NOT COPY DO NOT COPY DO NOT COPY DO NOT COPY Copyright © 1999 by John F. Wakerly Copying Prohibited In addition to using the tools above, designers may sometimes write specialized programs in high-level languages like C or C++, or scripts in languages like PERL, to solve particular design problems. For example, Section 11.1 gives a few examples of C programs that generate the “truth tables” for complex combinational logic functions. Although CAD tools are important, they don’t make or break a digital designer. To take an analogy from another field, you couldn’t consider yourself to be a great writer just because you’re a fast typist or very handy with a word processor. During your study of digital design, be sure to learn and use all the PROGRAMMABLE LOGIC DEVICES VERSUS SIMULATION Later in this book you’ll learn how programmable logic devices (PLDs) and fieldprogrammable gate arrays (FPGAs) allow you to design a circuit or subsystem by writing a sort of program. PLDs and FPGAs are now available with up to millions of gates, and the capabilities of these technologies are ever increasing. If a PLD- or FPGA-based design doesn’t work the first time, you can often fix it by changing the program and physically reprogramming the device, without changing any components or interconnections at the system level. The ease of prototyping and modifying PLD- and FPGA-based systems can eliminate the need for simulation in board-level design; simulation is required only for chip-level designs. The most widely held view in industry trends says that as chip technology advances, more and more design will be done at the chip level, rather than the board level. Therefore, the ability to perform complete and accurate simulation will become increasingly important to the typical digital designer. However, another view is possible. If we extrapolate trends in PLD and FPGA capabilities, in the next decade we will witness the emergence of devices that include not only gates and flip-flops as building blocks, but also higher-level functions such as processors, memories, and input/output controllers. At this point, most digital designers will use complex on-chip components and interconnections whose basic functions have already been tested by the device manufacturer. In this future view, it is still possible to misapply high-level programmable functions, but it is also possible to fix mistakes simply by changing a program; detailed simulation of a design before simply “trying it out” could be a waste of time. Another, compatible view is that the PLD or FPGA is merely a full-speed simulator for the program, and this full-speed simulator is what gets shipped in the product! Does this extreme view have any validity? To guess the answer, ask yourself the following question. How many software programmers do you know who debug a new program by “simulating” its operation rather than just trying it out? In any case, modern digital systems are much too complex for a designer to have any chance of testing every possible input condition, with or without simulation. As in software, correct operation of digital systems is best accomplished through practices that ensure that the systems are “correct by design.” It is a goal of this text to encourage such practices
Chapter 1 Introduction tools that are available to you,such as schematic-entry programs,simulators, and HDL co you'll be able to produce good results.Please pay attention to what you're producing with them! 1.6 Integrated Circuits A collection of one or more gates fabricated on a single silicon chip is called an integrated circuit (IC) integrated circuit (IC).Large ICs with tens of millions of transistors may be halt an inch or more on a side,while small ICs may be less than one-tenth of an inch on a side. Regardless ICis initially part ofamuch up to ten inches in diameter,containing dozens to hundreds of replicas of the same IC.All of the IC chips on the wafer are fabricated at the same time,like pizzas that are eventually sold by the in this case.each piece (IC the wafer and defective ones are marked.Then the wafer is sliced up to produce the individual dice,and the marked ones are discarded.(Compare with the pizza- maker who sells all the pieces,even the ones without enough pepp roni!)Each unmarked die is mounted in a package,its pads are connected to the package pins,and the packaged IC is subjected to a final test and is shipped to a customer. Some people use the term“IC”to refer to a silicon die.Someuse“chip”to refer to the same thing.Still others use“IC”or“chip”to refer to the combination ofa silicon die and its package.Digital designers tend to use the two terms inter- changeably,and they really don't care what they're talking about.They don't require a precise definition,since they're only looking at the functional and elec trical behavior of these things.In the balance of this text,we'll use the term /Cto refer to a packaged die. A DICEY A reader of the second edition wrote to me to collect a $5 reward for pointing out my DECISION “glaring”misuse of“dice”as the plural of“die.”According to the dictionary.she said,the plural form of“die”is“dice”only when describing those little cubes with Being stubbom.l asked m friends at the iroprrabu dots d she produced the references to prove i issue.According to the editor. There is,indeed,much dispute over this term.We actually stopped using the term "dice"in Microprocessor Report more than four years ago.I actually prefer the plural"die,".but perhaps it is best to avoid using the plural whenever possible. So there you have it,even the experts don't agree with the dictionary!Rather than cop out,I boldly chose to use"dice"anyway,by rolling the dice. Copyright1999 by John F.Wakerly Copying Prohibited
12 Chapter 1 Introduction DO NOT COPY DO NOT COPY DO NOT COPY DO NOT COPY DO NOT COPY DO NOT COPY DO NOT COPY DO NOT COPY DO NOT COPY Copyright © 1999 by John F. Wakerly Copying Prohibited tools that are available to you, such as schematic-entry programs, simulators, and HDL compilers. But remember that learning to use tools is no guarantee that you’ll be able to produce good results. Please pay attention to what you’re producing with them! 1.6 Integrated Circuits A collection of one or more gates fabricated on a single silicon chip is called an integrated circuit (IC). Large ICs with tens of millions of transistors may be half an inch or more on a side, while small ICs may be less than one-tenth of an inch on a side. Regardless of its size, an IC is initially part of a much larger, circular wafer, up to ten inches in diameter, containing dozens to hundreds of replicas of the same IC. All of the IC chips on the wafer are fabricated at the same time, like pizzas that are eventually sold by the slice, except in this case, each piece (IC chip) is called a die. After the wafer is fabricated, the dice are tested in place on the wafer and defective ones are marked. Then the wafer is sliced up to produce the individual dice, and the marked ones are discarded. (Compare with the pizzamaker who sells all the pieces, even the ones without enough pepperoni!) Each unmarked die is mounted in a package, its pads are connected to the package pins, and the packaged IC is subjected to a final test and is shipped to a customer. Some people use the term “IC” to refer to a silicon die. Some use “chip” to refer to the same thing. Still others use “IC” or “chip” to refer to the combination of a silicon die and its package. Digital designers tend to use the two terms interchangeably, and they really don’t care what they’re talking about. They don’t require a precise definition, since they’re only looking at the functional and electrical behavior of these things. In the balance of this text, we’ll use the term IC to refer to a packaged die. integrated circuit (IC) wafer die A DICEY DECISION A reader of the second edition wrote to me to collect a $5 reward for pointing out my “glaring” misuse of “dice” as the plural of “die.” According to the dictionary, she said, the plural form of “die” is “dice” only when describing those little cubes with dots on each side; otherwise it’s “dies,” and she produced the references to prove it. Being stubborn, I asked my friends at the Microprocessor Report about this issue. According to the editor, There is, indeed, much dispute over this term. We actually stopped using the term “dice” in Microprocessor Report more than four years ago. I actually prefer the plural “die,” . but perhaps it is best to avoid using the plural whenever possible. So there you have it, even the experts don’t agree with the dictionary! Rather than cop out, I boldly chose to use “dice” anyway, by rolling the dice. IC
Section1.6 Integrated Circuits 13 Figure 1-4 Dual in-line pin (DIP) pin 20 packages:(a)14-pin; pin 14 (b)20-pin;(c)28-pin. 011 pin 15 a.6 In the early days of integrated circuits,ICs were classified by size-small. medium,or large small-scale integration and contain the equivalent of I to 20 gates.SSI ICs typically contain a handful of (SSI) gates or flip-flops,the basic building blocks of digital design. The SSI ICs that you're likely to encounter in an educational lab come in a 14-pin dual in-line-pin (DIP)package.As shown in Figure 1-4(a),the spacing dual in-line-pin (DIP) between pins in a column is 0.1 inch and the spacing between columns is 0.3 package inch.Larger DIP packages accommodate functions with more pins,as shown in (b)and(c).A pin diagram shows the assignment of device signals to package pin diagram pins,or pinout.Figure 1-5 shows the pin diagrams for a few common SSI ICs. pinout Such diagrams are used only for mechanical reference,when a designer needs to determine the pin numbers for a particular IC.In the schematic diagram for a Figure 1-5 Pin diagrams for a few 7400-series SSI ICs 四在网 Copyright 1999 by John F.Wakerly Copying Prohibited
Section 1.6 Integrated Circuits 13 DO NOT COPY DO NOT COPY DO NOT COPY DO NOT COPY DO NOT COPY DO NOT COPY DO NOT COPY DO NOT COPY DO NOT COPY Copyright © 1999 by John F. Wakerly Copying Prohibited In the early days of integrated circuits, ICs were classified by size—small, medium, or large—according to how many gates they contained. The simplest type of commercially available ICs are still called small-scale integration (SSI), and contain the equivalent of 1 to 20 gates. SSI ICs typically contain a handful of gates or flip-flops, the basic building blocks of digital design. The SSI ICs that you’re likely to encounter in an educational lab come in a 14-pin dual in-line-pin (DIP) package. As shown in Figure 1-4(a), the spacing between pins in a column is 0.1 inch and the spacing between columns is 0.3 inch. Larger DIP packages accommodate functions with more pins, as shown in (b) and (c). A pin diagram shows the assignment of device signals to package pins, or pinout. Figure 1-5 shows the pin diagrams for a few common SSI ICs. Such diagrams are used only for mechanical reference, when a designer needs to determine the pin numbers for a particular IC. In the schematic diagram for a small-scale integration (SSI) dual in-line-pin (DIP) package (a) 0.3" (b) (c) 0.1" pin 1 pin 14 pin 8 0.1" pin 1 pin 20 0.3" pin 11 0.6" 0.1" pin 1 pin 28 pin 15 Figure 1-4 Dual in-line pin (DIP) packages: (a) 14-pin; (b) 20-pin; (c) 28-pin. pin diagram pinout 1 2 3 4 5 6 7 14 13 12 11 10 9 GND 8 VCC 7400 1 2 3 4 5 6 7 14 13 12 11 10 9 GND 8 VCC 7402 1 2 3 4 5 6 7 14 13 12 11 10 9 GND 8 VCC 7404 1 2 3 4 5 6 7 14 13 12 11 10 9 GND 8 VCC 7410 1 2 3 4 5 6 7 14 13 12 11 10 9 GND 8 VCC 7411 1 2 3 4 5 6 7 14 13 12 11 10 9 GND 8 VCC 7420 1 2 3 4 5 6 7 14 13 12 11 10 9 GND 8 VCC 7421 1 2 3 4 5 6 7 14 13 12 11 10 9 GND 8 VCC 7430 1 2 3 4 5 6 7 14 13 12 11 10 9 GND 8 VCC 7432 1 2 3 4 5 6 7 14 13 12 11 10 9 GND 8 VCC 7408 Figure 1-5 Pin diagrams for a few 7400-series SSI ICs
14 Chapter 1 Introduction TINY-SCALE In the coming years,perhaps the most popular remaining use of SSI and MSI, INTEGRATION in DIP p es.will be ined simple circuits in the same way that their professors did years ago. However,much to my surprise and delight,a segment of the IC industry has actually gone downscale from SSI in the past few years.The idea has been to sell individual logic gates in very small packages These devices handle simple functions that are sometimes needed to match larger-scale components to a particular desigr 0 some ases they are used to work around bugs in the larger-scale components or their interface An example of such an IC is Motorola's 74VHCIG00.This chip is a single 2-input NAND gate housed in a 5-pin package (power,ground,two inputs,and one output).The entire package,including pins,measures only 0.08 inches on a side,and is only 0.04 inches high!Now that's what I would call"tiny-scale integration"! digital circuit,pin diagrams are not used.Instead,the various gates are grouped functionally e'll show in Section 5.1. Although SSI ICs are still sometimes used as"glue"to tie together larger- scale elements in complex systems,they have been largely supplanted by pro- grammable logic devices,which we'll study in Sections 5.3 and 8.3. medium-scale The next larger commercially available ICs are called medium-scale integration (MSI integration (MS),and contain the equivalent of about 20 to 200 gates.An MSI IC typically contains a functional building block.such as a decoder,register.or counter.In Chapters 5 and 8,we'll place a strong emphasis on these building blocks.Even though the use of discrete MSI ICs is declining,the equivalent building blocks are used extensively in the design of larger ICs. arge scale integration(LSI)ICs are bigger still,containing the equivalent of 200 to 200,000 gates or more.LSI parts include small memories,micro- processors,programmable logic devices,and customized devices. STANDARD Many standard"high-level"functions appear over and over as building blocks in digital design.Historically,these functions were first integrated in MSI cir- FUNCTIONS cuits.Subsequently,they have appeared as components in the"macro"libraries for ASIC design,as“standard cells'”in VLSI design,as“canned”functions in PLD programming languages,and as library functions in hardware-description anguages such as vHDL Standard logic functions are introduced in Chapters 5 and 8 as 74-series MSI parts,as well as in HDL form.The discussion and examples in these chap- ters provide a basis for understanding and using these functions in any form. Copyright 1999 by John F.Wakerly Copying Prohibited
14 Chapter 1 Introduction DO NOT COPY DO NOT COPY DO NOT COPY DO NOT COPY DO NOT COPY DO NOT COPY DO NOT COPY DO NOT COPY DO NOT COPY Copyright © 1999 by John F. Wakerly Copying Prohibited digital circuit, pin diagrams are not used. Instead, the various gates are grouped functionally, as we’ll show in Section 5.1. Although SSI ICs are still sometimes used as “glue” to tie together largerscale elements in complex systems, they have been largely supplanted by programmable logic devices, which we’ll study in Sections 5.3 and 8.3. The next larger commercially available ICs are called medium-scale integration (MSI), and contain the equivalent of about 20 to 200 gates. An MSI IC typically contains a functional building block, such as a decoder, register, or counter. In Chapters 5 and 8, we’ll place a strong emphasis on these building blocks. Even though the use of discrete MSI ICs is declining, the equivalent building blocks are used extensively in the design of larger ICs. Large-scale integration (LSI) ICs are bigger still, containing the equivalent of 200 to 200,000 gates or more. LSI parts include small memories, microprocessors, programmable logic devices, and customized devices. TINY-SCALE INTEGRATION In the coming years, perhaps the most popular remaining use of SSI and MSI, especially in DIP packages, will be in educational labs. These devices will afford students the opportunity to “get their hands” dirty by “breadboarding” and wiring up simple circuits in the same way that their professors did years ago. However, much to my surprise and delight, a segment of the IC industry has actually gone downscale from SSI in the past few years. The idea has been to sell individual logic gates in very small packages. These devices handle simple functions that are sometimes needed to match larger-scale components to a particular design, or in some cases they are used to work around bugs in the larger-scale components or their interfaces. An example of such an IC is Motorola’s 74VHC1G00. This chip is a single 2-input NAND gate housed in a 5-pin package (power, ground, two inputs, and one output). The entire package, including pins, measures only 0.08 inches on a side, and is only 0.04 inches high! Now that’s what I would call “tiny-scale integration”! STANDARD LOGIC FUNCTIONS Many standard “high-level” functions appear over and over as building blocks in digital design. Historically, these functions were first integrated in MSI circuits. Subsequently, they have appeared as components in the “macro” libraries for ASIC design, as “standard cells” in VLSI design, as “canned” functions in PLD programming languages, and as library functions in hardware-description languages such as VHDL. Standard logic functions are introduced in Chapters 5 and 8 as 74-series MSI parts, as well as in HDL form. The discussion and examples in these chapters provide a basis for understanding and using these functions in any form. medium-scale integration (MSI) large-scale integration (LSI)
Section 1.7 Programmable Logic Devices 6 The dividing line between LSI and very large-scale integration (VLSI)is very large-scale fuzzy,and tends to be stated in terms of transistor count rather than gate count. integration (VLSI) Any IC with over 1,000,000 transistors is definitely VLSI,and that includes most microprocessors and memories nowadays,as well as larger programmable logic devices and customized devices.In 1999,the VLSI ICs as large as 50 million transistors were being designed. 1.7 Programmable Logic Devices There are a wide variety of ICs that can have their logic function"programmed" into them after they are manufactured.Most of these devices use technology that also allows the function to be reprogrammed,which means that if you find a bug in your design,you may be able to fix it without physically replacing or rewiring the device.In this book,we'll frequently refer to the design opportunities and methods for such devices Historically,programmable logic arrays (PLAs)were the first program- programmable logic mable logic devices.PLAs contained a two-level structure of AND and OR gates arrav (PLA) with user programmable conections.Using this structure,a designer could accommodate any logic function up to a certain level of complexity using the well-known theory of logic synthesis and minimization that we'll present in Chapter 4 PLA structure was enhanced and PLA costs were reduced with the intro duction of programmable array logic (PAL)devices.Today,such devices are generically called programmable logic devices(PLDs).and are the"MSI"ofthe rammable logic programmable logic industry.We'll tosay about PLDarchitecture and technology in Sections 5.3 and 8.3 The ever-increasing capacity of integrated circuits created an opportunity for IC manufacturers to design larger PLDs for larger digital-design applica- tions.However,fo technical reasons that well discuss in the basic two-level AND-OR structure of PLDs could not be scaled to larger sizes. Instead.IC manufacturers devised complex PLD (CPLD)architectures to complex PLD (CPLD) achieve the required scale.A typical CPLD is merely a collection of multiple PLDs and an interconnection structure,all on the same chip.In addition to the individual PLDs,the on-chip interconnection structure is also programmable, providing a rich variety of design possibilities.CPLDs can be scaled to larger sizes by increasing the number of individual PLDs and the richness of the inter- connection structure on the cPlD chip. At about the same time that CPLDs were being invented,other IC manu- facturers took a differ appro pach to scaling the size of progra able logic chips.Compared to a CPLD,a field-programmable gate arrays(FPGA)contains field-programmable a much larger number of smaller individual logic blocks,and provides a large. gate array (FPGA) distributed interconnection structure that dominates the entire chip.Figure 1-6 illustrates the difference between the two chip-design approaches. Copyright 1999 by John F.Wakerly Copying Prohibited
Section 1.7 Programmable Logic Devices 15 DO NOT COPY DO NOT COPY DO NOT COPY DO NOT COPY DO NOT COPY DO NOT COPY DO NOT COPY DO NOT COPY DO NOT COPY Copyright © 1999 by John F. Wakerly Copying Prohibited The dividing line between LSI and very large-scale integration (VLSI) is fuzzy, and tends to be stated in terms of transistor count rather than gate count. Any IC with over 1,000,000 transistors is definitely VLSI, and that includes most microprocessors and memories nowadays, as well as larger programmable logic devices and customized devices. In 1999, the VLSI ICs as large as 50 million transistors were being designed. 1.7 Programmable Logic Devices There are a wide variety of ICs that can have their logic function “programmed” into them after they are manufactured. Most of these devices use technology that also allows the function to be reprogrammed, which means that if you find a bug in your design, you may be able to fix it without physically replacing or rewiring the device. In this book, we’ll frequently refer to the design opportunities and methods for such devices. Historically, programmable logic arrays (PLAs) were the first programmable logic devices. PLAs contained a two-level structure of AND and OR gates with user-programmable connections. Using this structure, a designer could accommodate any logic function up to a certain level of complexity using the well-known theory of logic synthesis and minimization that we’ll present in Chapter 4. PLA structure was enhanced and PLA costs were reduced with the introduction of programmable array logic (PAL) devices. Today, such devices are generically called programmable logic devices (PLDs), and are the “MSI” of the programmable logic industry. We’ll have a lot to say about PLD architecture and technology in Sections 5.3 and 8.3. The ever-increasing capacity of integrated circuits created an opportunity for IC manufacturers to design larger PLDs for larger digital-design applications. However, for technical reasons that we’ll discuss in \secref{CPLDs}, the basic two-level AND-OR structure of PLDs could not be scaled to larger sizes. Instead, IC manufacturers devised complex PLD (CPLD) architectures to achieve the required scale. A typical CPLD is merely a collection of multiple PLDs and an interconnection structure, all on the same chip. In addition to the individual PLDs, the on-chip interconnection structure is also programmable, providing a rich variety of design possibilities. CPLDs can be scaled to larger sizes by increasing the number of individual PLDs and the richness of the interconnection structure on the CPLD chip. At about the same time that CPLDs were being invented, other IC manufacturers took a different approach to scaling the size of programmable logic chips. Compared to a CPLD, a field-programmable gate arrays (FPGA) contains a much larger number of smaller individual logic blocks, and provides a large, distributed interconnection structure that dominates the entire chip. Figure 1-6 illustrates the difference between the two chip-design approaches. very large-scale integration (VLSI) programmable logic array (PLA) programmable array logic (PAL) device programmable logic device (PLD) complex PLD (CPLD) field-programmable gate array (FPGA)