METALLIZATION INTERCONNECTS Read: Plummer Chapter I 1; Campbell Chapter 15 Why do we need metallization?- To connect devices electrically to each other and to the outside world; power and data Local interconnect doped polySi, silicides Packaging Cu or Al(several mm per chip) Materials choices for interconnects, more complex multilayer interconnects ll/703 3.155J6.l52J Generic metallization layout ontact(local interconnect) ll/703 3.155J6.l52J
METALLIZATION, INTERCONNECTS Read: Plummer Chapter 11; Campbell Chapter 15 Why do we need metallization? - To connect devices electrically Local interconnects: • gate contacts: doped polySi, silicides Inter-level to each other and to the outside world; power and data. • plugs, vias, e.g. W Packaging • Longer range interconnects: Cu or Al (several mm per chip) Materials choices for interconnects, more complex multilayer interconnects. 11/17/03 3.155J/6.152J 1 Generic metallization layout gate contact (local interconnect) Plug, via metal lines (global interconnects) 11/17/03 3.155J/6.152J 2 1
Requirements for metallization: 1. Low electrical resistivity 2. Electrical contact with device(Ohmic or Schottky) methods(can it be etched?) 5. Thermal and mechanical stability 6. Reliability in service, e.g. electro-migration. Next week (beside metallization inter-metal dielectrics are equally important ll/703 3.155J6.l52J l. Resistivity, why low Crudely: I=I cm/ Fringe field factor TL-RC-1.8K. -_1I T2=36K Local interconnects L F r2=10-7sec Global interconnects A few m Chip area(mm-) ll/703 3.155J6.l52J
Requirements for metallization: 1. Low electrical resistivity 2. Electrical contact with device (Ohmic or Schottky) 3. Step coverage 4. Patterning methods (can it be etched?) 5. Thermal and mechanical stability 6. Reliability in service, e.g. electro-migration. Next week (beside metallization, inter-metal dielectrics are equally important …) 11/17/03 3.155J/6.152J 3 ox ≈ Fmin oxe0r ËHxox s WL ¯ Ë Fmin ¯ k 4 ox t L ª10-17 10-8 t L = RCª1.8k e0rL2 Á ˜ + H,Ls, xox t L ª 3.6k Á ˜ t gate ª10-11 min = 0.25 microns WSi2 W Al Cu for F Poly Si Local interconnects L Fmin sec Delay Global interconnects L A few mm t L ª10-9 sec time (sec) Inductive effects 2 -3 orders smaller; t ind = (LC) 10-12 1 10 100 Chip area (mm2 ) 11/17/03 3.155J/6.152J 4 Crudely: t = 1 cm/c = 10-8 sec but if e > e 0, t = 1 cm (eµ) > 10-8 sec Compared to gate times of order 10-11 sec L WL R = r C = koxe0 WH xox Fringe field factor Ê 1 1 HL + koxe0 L 1. Resistivity, why low? CI Cs R L H Ls W s ˆ 2 ˆ Ê L 2
1. Resistivity Properties of interconnect materiak resistivity Which material Melting point (C) is better for local and which for 40-70 28-35 15-20 polysilicon(heavily doped) Properties of commonly used interconnected materials in both Si and GaAs technologies Material Bulk Resistivity(uf2-cm Melting Point (C) LAu use for gaAs 2. Ohmic and Schottky junctie ons Even after selecting conductor material no guarantee it will make good electrical contact to Si, GaAs, etc Nature of contact depends on charge transfer at metal/semiconductor interface charging = band bending bending depends on work functions, m, and electron affinity, x Vacuum E Metal n-type semiconductor ll/703 3.155J6.l52J
3 11/17/03 3.155J/6.152J 5 1. Resistivity Which material is better for local and which for global interconnects? use for GaAs 11/17/03 3.155J/6.152J 6 2. Ohmic and Schottky junctions Even after selecting conductor material, no guarantee it will make good electrical contact to Si, GaAs, etc. Nature of contact depends on charge transfer at metal/semiconductor interface; charging => band bending & bending depends on work functions, fm , fs and electron affinity, c. Ef Energy Metal n-type semiconductor Vacuum fm c fs Ef Ec Ev
Background for Schottky barriers When a p-n junction is formed.. (depletion region) =>E field tha there is a net flow of camers halts flow of e's across interface. until energy difference is neutralized and What happens at semiconductor/metal interface ll/703 3.155J6.l52J Schottky barriers When a meta- type semiconductor junction is formed withφa>中… Vacuum Mobile es Heavily n here is a net flow of camers intill energy difference is neutralized and Fermi energies come to a common value depletion region(length governed by screening length) ll/703 3.155J6.l52J
Background for Schottky barriers When a p-n junction is formed... Mobile e’s p Mobile holes Immobile e’s n Immobile holes e - EF EF EF E Excess e’s h’s (depletion region) => E field that halts flow of e’s ... there is a net flow of carriers across interface… until energy difference is neutralized and Fermi energies come to a common value. What happens at semiconductor/metal interface… 11/17/03 3.155J/6.152J 7 fm fs Schottky barriers When a metal -n-type semiconductor junction is formed with > ... Vacuum Vacuum Mobile e’s Immobile holes e - ... there is a net flow of carriers across interface… fm fs n EF EF EF Mobile e’s n fm E Heavily doped EF Lightly doped until energy difference is neutralized and Fermi energies come to a common value. w depletion region (length governed by screening length) 11/17/03 3.155J/6.152J 8 4
Ideal Schottky junction: m>ps, n-type semiconducto here is a barrier B Vacuum preventing electrons from going E from metal to n-type semiconductor There is an internal field keeping EF carriers away from junction. This junction behaves like a diode f中n<中 there is no barrier for n-type ll/703 3.155J6.l52J
Ideal Schottky junction: > There is a barrier n-type semiconductor. fB M o b i l e e’s n fm E preventing electrons from going from metal to EF EF f , n-type semiconductor s There is an internal field keeping carriers away from junction. This junction behaves like a diode. Vacuum If < there is no barrier for n-type semiconductor (Ohmic). ln I fm V fB 11/17/03 3.155J/6.152J 9 fs fm 5