MLT Rellablllty of semiconductor I CS plus spin-based electronics 6. 12J/3.155J Microelectronic processing Read Campbell, p. 425-428 and Ch. 20 Sec. 20.1, 20.2: Plummer, Sec. 11.5.6 IC reliability: Yield=( operating parts)/(total# produced) Particles on surface interrupt depositions, flaw devices Oxides, dielectrics fail by charging or dielectric breakdown. Metals fail by corrosion and Reliability in Spin-based electronics, spin valves and Nv.24,2003 Reliability of semiconductor I Cs Why is this an issue? Net yleld Is product: Y, x Y2 x Y3..(e.g., a 10-step process each 95%>60% yleld) and average over last 7 lots
M.I.T. Reliability of semiconductor I Cs plus spin-based electronics 6.12J / 3.155J Microelectronic processing Read Campbell, p. 425 -428 and Ch. 20. Sec. 20.1, 20.2; Plummer, Sec. 11.5.6 IC reliability: Yield = (# operating parts) / (total # produced) Failure of devices occurs over time (lifetime) by various mechanisms: w Particles on surface interrupt depositions, flaw devices w Oxides, dielectrics fail by charging or dielectric breakdown, w Metals fail by corrosion and Electro-migration: mass transport of one species along grain boundaries in metal toward one of the electrodes with subsequent failure there. (Ohring, p. 379 - 383) w Magnetic systems: interdiffusion, stress Reliability in Spin-based electronics, spin valves and magnetic random access memories (MRAM) N o v . 2 4 , 2 0 0 3 N o v . 2 4 , 2 0 0 3 6.12J / 3.155J Microelectronic processing Reliability of semiconductor I Cs Why is this an issue? “Learning curve”: yield vs. lot number : yield vs. lot number and average over last 7 lots. Defect density, D, has decreased with succeeding higher-density with succeeding higher-density dynamic random access memories dynamic random access memories … Net yield is product: Y1 x Y2 x Y3… (e.g., a 10-step process each 95% =>60% yield) 1
KIller defects fect areal density 6. 12J/3.155J Microelectronic processing Simplest yleld model assumes Independent, randomly-dIstrlbuted defects Polsson dlstrlbutlon) of defect Y D= defects/area p verlapping Particle control: Class(Max #/ft3)>0.5 um Nv.24,2003 Killer defects Defects are not randomly distributed spatially (e.g. stress concentrations generate dislocations, stacking fault Empirical distribution of defect sizes measure, ore Y (1-G exp(-AD) ■■■■■
Y = (1- G)e-AD(d ) Fraction of disk area in which all circuits fail N o v . 2 4 , 2 0 0 3 6.12J / 3.155J Microelectronic processing Killer defects Defect areal density Simplest yield model assumes independent, randomly-distributed defects, (Poisson distribution): Particle control: Class (Max #/ft3) > 0.5 mm 1 1 10 10 100 100 1000 1000 A = chip area D = defects/area Yield Y µe-AD AD AD = probability of defect overlapping chip N o v . 2 4 , 2 0 0 3 6.12J / 3.155J Microelectronic processing Killer defects Defect size Defects are not randomly distributed spatially (e.g. stress concentrations generate dislocations, stacking faults), or by size, d, i.e. D = D(d) D(d) = c dq d 0 q +1 ,0 < d < d 0 D(d) = c d 0 p-1 dp , d 0 < d < dmax Meander-line process control module 1- G Empirical distribution of defect sizes: Hard to measure, Therefore Y (1-G) exp(-AD) G is fractional area where all fail 2
Reliability definitions 6. 12J/3.155J Microelectronic processing e Cumulative fallure dlstrlbutlon function, F(t R(n F(D-fraction of fallures up to tlme, t. Survlval or rellablllty dlstrlbutlon function, R(t: R(t=1·F( Fallure probablity density function, f(t) f(n (This is key to predicting failure rates Mean time to fallure, MITF MTTF=ft·f(r)d Median time to fallure, tso: time after whIch half of devices have falled Nv.24,2003 Reliability definitions Fallure probabllity density/number remaInIng: ()=20)-k+a dF() Fallure rate in steady state: 4(0- const.-A,(fractional failure frequency) Steady-state survival R(t)∝e or reliability drops off exponentially with time steady state f( df dR
Reliability definitions 6.12J / 3.155J Microelectronic processing Cumulative failure distribution function, F (t): F (t) R (t) 1 F (t) = fraction of failures up to time, t. Survival or reliability distribution function, R (t): R (t)= 1 - F (t) 0 0 t 1 Failure probability density function, f (t): f (t) = dF/dt 0 (This is key to predicting failure rates) 0 t f (t) • Mean time to failure, MTTF: MTTF = Út ⋅ f(t)dt 0 Median time to failure, t50: time after which half of devices have failed. N o v . 2 4 , 2 0 0 3 Reliability definitions 6.12J / 3.155J Microelectronic processing 1 Failure probability density/number remaining: l(t) = f(t)/R(t) 0 0 t l(t) Failure rate during time dt, l(t): l(t) = R(t) - R(t +dt) dtR(t) = - 1 R(t) dR(t) dt 1 dF(t) = R(t) dt Failure rate l(t) = - 1 dR(t) = const. = l0 (fractional failure frequency) in steady state: R(t) dt Steady-state survival Hence: or reliability drops off R(t) µ e - l0 t exponentially with time steady state: • f (t) = dF = - dR µ l0e-l0 t MTTF = Ú t ⋅ f (t)dt = 1 ss dt dt ss 0 l0 N o v . 2 4 , 2 0 0 3 3
Different failure processes 6. 12J/3.155J Microelectronic processing Fallure rate 0 Steady mortality" state Different failure processes have different thermally activated rates r=e Nv.24,2003 More realistic example: log-normal distribution 6. 12J/3.155J Microelectronic processing ge standard devlation tIme for 50% of devices to fall f() OTv/T O=In(tso/t16) and MTTF =exp(In(tsn +0/2) Log-normal dlstrlbutlon: If In of fallure time Is plotted Vs. fractlon of chlps falling within a range of tlmes glves a normal, L.e. Gausslan dlstrlbutlon, then the dlstrlbutlon Is log-normal Lognormal dIstrbution is hard to handle analytically but can be represented more simply on a log-normal scale
Different failure processes mortality” state Wearout 6.12J / 3.155J Microelectronic processing l(t) = l0 l (t) t 0 “Infant Steady Failure rate: Ea Different failure processes have - k B T different thermally activated rates: r = r 0e N o v . 2 4 , 2 0 0 3 6.12J / 3.155J Microelectronic processing More realistic example: log-normal distribution s = standard deviation t = time for 50% of devices to fail 50 Ï ln(t) ¸ 1 Ô [ ]2 Ô f (t) = expÌ- ˝ st 2p Ô 2s2 Ô Ó ˛ s = ln(t50 / t 16 ) and MTTF = exp{ln(t50 + s2 /2) Log-normal distribution: if ln of failure time is plotted vs. fraction of chips failing within a range of times gives a normal, i.e. Gaussian distribution, then the distribution is log-normal. Lognormal distribution is hard to handle analytically but can be represented more simply on a log-normal scale: N o v . 2 4 , 2 0 0 3 4
g-normal distribution 6. 12J/3.155J Microelectronic processing sigma =05 Bognor mal PDP(sigm= 2) Bognor mal PDF(sigma a 5) http://www.itl.nistgov/div898/handbook/eda/section3/eda3669.htm N口w24,2003 Log-normal dlstrlbutlon can represent any of the 3 regimes by varying o 6. 12J/3.155J Microelectronic processing The lognormal distributio could Infant mortallty Fallure rate: Wearout
s < 1 could represent wearout N o v . 2 4 , 2 0 0 3 6.12J / 3.155J Microelectronic processing http://www.itl.nist.gov/div898/handbook/eda/section3/eda3669.htm log-normal distribution f (t) = 1 st 2p exp - [ ] ln(t) 2 2s2 Ï Ì Ô Ó Ô ¸ ˝ Ô ˛ Ô N o v . 2 4 , 2 0 0 3 6.12J / 3.155J Microelectronic processing Log-normal distribution can represent any of the 3 regimes by varying s s > 1 could represent infant mortality l (t) t 0 Infant mortality Steady state Wearout Failure rate: 5