SECTION 2 IGH SPEED OP AMPS Driving Capacitive Loads Cable Driving Single-Supply Considerations Application Circuits
1 SECTION 2 HIGH SPEED OP AMPS Driving Capacitive Loads Cable Driving Single-Supply Considerations Application Circuits
sectioN 2 HIGH SPEED OP AMPS Walt Jung and walt Kester Modern system design increasingly makes use of high speed ICs as circuit building blocks. With bandwidths going up and up, demands are placed on the designer for faster and more power efficient circuits. The default high speed amplifier has changed over the years, with high speed complementary bipolar(CB) process ICs such as the A846 and AD847 in use just about ten years at this writing durin this time the general utility/availability of these and other iCs have raised the " high speed" common performance denominator to 50MHz. The most recent extended AD8001/AD8002, the AD9631/9632 and the Ad8036/AD8037 now extend the the frequency complementary bipolar (XFCB) process high speed devices such as operating range into the UhF region. Of course, a traditional performance barrier has been speed, or perhaps more accurately, painless speed. While fast IC amplifiers have been around for some time until more recently they simply havent been the easiest to use. As an example, devices with substantial speed increases over 741/301A era types, namely the 318- family, did so at the expense of relatively poor settling and capacitive loading characteristics. Modern CB process parts like the AD84X series provide far greater speed, faster settling, and do so at low user cost. Still, the application of high performance fast amplifiers is never entirely a cookbook process, so designers still need to be wary of many inter-related key issues. This includes not just the amplifier selection, but also control of parasitics and other potentially performance-limiting details in the surrounding circuit It is worth underscoring that reasons for the"speed revolution"lie not just in affordability of the new high speed ICs, but is also rooted in their ease of use. Compared to earlier high speed ICs, CB process devices are generally more stable with capacitive loads(with higher phase margins in general), have lower DC errors consume less power for a given speed, and are all around more"user friendly ". Taking this a step further, XFCB family devices, which extend the utility of the op amp to literally hundreds of MHz, are understandably less straightforward in terms of their application(as is any amplifier operating over such a range). Thus, getting the most from these modern devices definitely stresses the total environment aspects of design Another major ease of use feature found in today's linear ICs is a much wider range of supply voltage characterization. While the older +15V standard is still much in use, there is a trend towards including more performance data at popular lower voltages, such as +5V, or+5V only, single supply operation. The most recent devices using the lower voltage XFCB process use supply voltages of either +5V, or simply +5V only. The trend towards lower supply voltages is unmistakable, with a goal of squeezing the highest performance from a given voltage/power circuit environment These"ease of use"design aspects with current ICs are illustrated in this chapter
2 SECTION 2 HIGH SPEED OP AMPS Walt Jung and Walt Kester Modern system design increasingly makes use of high speed ICs as circuit building blocks. With bandwidths going up and up, demands are placed on the designer for faster and more power efficient circuits. The default high speed amplifier has changed over the years, with high speed complementary bipolar (CB) process ICs such as the AD846 and AD847 in use just about ten years at this writing. During this time, the general utility/availability of these and other ICs have raised the “high speed” common performance denominator to 50MHz. The most recent extended frequency complementary bipolar (XFCB) process high speed devices such as the AD8001/AD8002, the AD9631/9632 and the AD8036/AD8037 now extend the operating range into the UHF region. Of course, a traditional performance barrier has been speed, or perhaps more accurately, painless speed. While fast IC amplifiers have been around for some time, until more recently they simply haven’t been the easiest to use. As an example, devices with substantial speed increases over 741/301A era types, namely the 318- family, did so at the expense of relatively poor settling and capacitive loading characteristics. Modern CB process parts like the AD84X series provide far greater speed, faster settling, and do so at low user cost. Still, the application of high performance fast amplifiers is never entirely a cookbook process, so designers still need to be wary of many inter-related key issues. This includes not just the amplifier selection, but also control of parasitics and other potentially performance-limiting details in the surrounding circuit. It is worth underscoring that reasons for the "speed revolution" lie not just in affordability of the new high speed ICs, but is also rooted in their ease of use. Compared to earlier high speed ICs, CB process devices are generally more stable with capacitive loads (with higher phase margins in general), have lower DC errors, consume less power for a given speed, and are all around more "user friendly". Taking this a step further, XFCB family devices, which extend the utility of the op amp to literally hundreds of MHz, are understandably less straightforward in terms of their application (as is any amplifier operating over such a range). Thus, getting the most from these modern devices definitely stresses the “total environment” aspects of design. Another major ease of use feature found in today's linear ICs is a much wider range of supply voltage characterization. While the older ±15V standard is still much in use, there is a trend towards including more performance data at popular lower voltages, such as ±5V, or +5V only, single supply operation. The most recent devices using the lower voltage XFCB process use supply voltages of either ±5V, or simply +5V only. The trend towards lower supply voltages is unmistakable, with a goal of squeezing the highest performance from a given voltage/power circuit environment. These "ease of use" design aspects with current ICs are illustrated in this chapter
along with parasitic issues, optimizing performance over supply ranges, and low distortion stages in a variety of applications. DRIVING CAPACITIVE LOADS From system and signal fidelity points of view, transmission line coupling between k tages is best, and is described in some detail in the next section. However, complete ransmission line system design may not always be possible or practical. In addition, various other parasitic issues need careful consideration in high performance designs. One such problem parasitic is amplifier load capacitance, which potentially comes into play for all wide bandwidth situations which do not use transmission line signal coupling a general design rule for wideband linear drivers is that capacitive loading(cap loading)effects should always be considered. This is because PC board capacitance can build up quickly, especially for wide and long signal runs over ground planes insulated by thin, higher k dielectric. For example, a 0.025" Pc trace using a G-10 dielectric of 0.03"over a ground plane will run about 22p F/foot(Reference 1). Even relatively small load capacitance (i.e, <100 pF) can be troublesome, since while not causing outright oscillation, it can still stretch amplifier settling time to greater than desirable levels for a given accuracy The effects of cap loading on high speed amplifier outputs are not simply detrimental, they are actually an anathema to high quality signals. However, before- the -fact designer know ledge still allows high circuit performance, by employing various tricks of the trade to combat the capacitive loading. If it is not driven via a transmission line, remote signal circuitry should be checked for capacitive loading very carefully, and characterized as best possible. Drivers which face poorly defined load capacitance should be bullet-proofed accordingly with an appropriate design technique from the options list below Short of a true matched transmission line system, a number of ways exist to drive a load which is capacitive in nature while maintaining amplifier stability. Custom capacitive load (cap load) compensation, includes two possible options, namely a); overcompensation, and b); an intentionally forced-high loop noise gain allowing crossover in a stable region. Both of these steps can be effective in special situations, as they reduce the amplifier's effective closed loop bandwidth, so as to restore stability in the presence of cap loading Overcompensation of the amplifier, when possible, reduces amplifier bandwidth so that the additional load capacitance no longer represents a danger to phase margin. As a practical matter however, amplifier compensation nodes to allow this are available on few high speed amplifiers. One such useful example is the AD829 compensated by a single capacitor at pin 5. In general, almost any amplifier using sternal compensation can always be over compensated to reduce bandwidth. This will restore stability against cap loads, by lowering the amplifiers unity gain frequency
3 along with parasitic issues, optimizing performance over supply ranges, and low distortion stages in a variety of applications. DRIVING CAPACITIVE LOADS From system and signal fidelity points of view, transmission line coupling between stages is best, and is described in some detail in the next section. However, complete transmission line system design may not always be possible or practical. In addition, various other parasitic issues need careful consideration in high performance designs. One such problem parasitic is amplifier load capacitance, which potentially comes into play for all wide bandwidth situations which do not use transmission line signal coupling. A general design rule for wideband linear drivers is that capacitive loading (cap loading) effects should always be considered. This is because PC board capacitance can build up quickly, especially for wide and long signal runs over ground planes insulated by thin, higher K dielectric. For example, a 0.025” PC trace using a G-10 dielectric of 0.03” over a ground plane will run about 22pF/foot (Reference 1). Even relatively small load capacitance (i.e., <100 pF) can be troublesome, since while not causing outright oscillation, it can still stretch amplifier settling time to greater than desirable levels for a given accuracy. The effects of cap loading on high speed amplifier outputs are not simply detrimental, they are actually an anathema to high quality signals. However, beforethe-fact designer knowledge still allows high circuit performance, by employing various tricks of the trade to combat the capacitive loading. If it is not driven via a transmission line, remote signal circuitry should be checked for capacitive loading very carefully, and characterized as best possible. Drivers which face poorly defined load capacitance should be bullet-proofed accordingly with an appropriate design technique from the options list below. Short of a true matched transmission line system, a number of ways exist to drive a load which is capacitive in nature while maintaining amplifier stability. Custom capacitive load (cap load) compensation, includes two possible options, namely a); overcompensation, and b); an intentionally forced-high loop noise gain allowing crossover in a stable region. Both of these steps can be effective in special situations, as they reduce the amplifier’s effective closed loop bandwidth, so as to restore stability in the presence of cap loading. Overcompensation of the amplifier, when possible, reduces amplifier bandwidth so that the additional load capacitance no longer represents a danger to phase margin. As a practical matter however, amplifier compensation nodes to allow this are available on few high speed amplifiers. One such useful example is the AD829, compensated by a single capacitor at pin 5. In general, almost any amplifier using external compensation can always be over compensated to reduce bandwidth. This will restore stability against cap loads, by lowering the amplifier’s unity gain frequency
CAPACITIVE LOADING ON OP AMP GENERALLY REDUCES PHASE MARGIN AND MAY CAUSE INSTABILITY, BUT INCREASING THE NOISE GAIN OF THE CIRCUIT IMPROVES STABILITY NOSE GAIN=1 : R1 NOISE GAIN.1. R2 GAIN STABLE LOG FREQUENCY LOG FREQUENCY Figure 2.1 forcing a high noise gain, is shown in Figure 2.1, where the capacitively loaded amplifier with a noise gain of unity at the left is seen to be unstable, due to a 1/B open loop rolloff intersection on the Bode diagram in an unstable -12dB/octave region. For such a case, quite often stability can be restored by introducing a higher noise gain to the stage, so that the intersection then occurs in a stable-6dB/octave region, as depicted at the diagram right Bode plot. RAISING NOISE GAIN (DC OR AC)FOR FOLLOWER OR INVERTER STABILITY (A) FOLLOWER (B) INVERTER 10 Figure 2.2 To enable a higher noise gain(which does not necessarily need to be the same as the stage's signal gain), use is made of resistive or RC pads at the amplifier input, as in Figure 2.2. This trick is more broad in scope than overcompensation, and has the advantage of not requiring access to any internal amplifier nodes. This generally allows use with any amplifier setup, even voltage followers. The technique adds an extra resistor RD, which works against rF to force the noise gain of the stage to a level appreciably higher than the signal gain(which is unity in both cases here Assuming that Cl is a value which produces a parasitic pole near the amplifiers natural crossover, this loading combination would likely lead to oscillation due to the
4 CAPACITIVE LOADING ON OP AMP GENERALLY REDUCES PHASE MARGIN AND MAY CAUSE INSTABILITY, BUT INCREASING THE NOISE GAIN OF THE CIRCUIT IMPROVES STABILITY Figure 2.1 Forcing a high noise gain, is shown in Figure 2.1, where the capacitively loaded amplifier with a noise gain of unity at the left is seen to be unstable, due to a 1/ß - open loop rolloff intersection on the Bode diagram in an unstable –12dB/octave region. For such a case, quite often stability can be restored by introducing a higher noise gain to the stage, so that the intersection then occurs in a stable –6dB/octave region, as depicted at the diagram right Bode plot. RAISING NOISE GAIN (DC OR AC) FOR FOLLOWER OR INVERTER STABILITY Figure 2.2 To enable a higher noise gain (which does not necessarily need to be the same as the stage’s signal gain), use is made of resistive or RC pads at the amplifier input, as in Figure 2.2. This trick is more broad in scope than overcompensation, and has the advantage of not requiring access to any internal amplifier nodes. This generally allows use with any amplifier setup, even voltage followers. The technique adds an extra resistor RD, which works against RF to force the noise gain of the stage to a level appreciably higher than the signal gain (which is unity in both cases here). Assuming that CL is a value which produces a parasitic pole near the amplifier’s natural crossover, this loading combination would likely lead to oscillation due to the
excessive phase lag. However with RD connected, the higher amplifier noise gain produces a new 1/B-open loop rolloff intersection, about a decade lower in frequency. This is set low enough that the extra phase lag from Cl is no longer a problem, and amplifier stability is restored a drawback to this trick is that the dC offset and input noise of the amplifier are raised by the value of the noise gain, when the optional cd is not present. But, when CD is used in series with RD, the offset voltage of the amplifier is not raised, and the gained-up AC noise components are confined to a frequency region above 1/(2pi.RD. CD). A further caution is that the technique can be somewhat tricky when separating these operating dc and aC regions, and should be applied carefully with regard to settling time( Reference 2). Note that these simplified examples are generic, and in practice the absolute component values should be matched to a specific amplifier Passive " cap load compensation, shown in Figure 2.3, is the most simple(and most popular)isolation technique available. It uses a simple "out-of-the-loop" series resistor Rx to isolate the cap load, and can be used with any amplifier, current or voltage feedback, FETor bipolar input. OPEN-LOOP SERIES RESISTANCE ISOLATES CAPACITIVE LOAD FOR AD811 CURRENT FEEDBACK OP AMP (CIRCUIT BANDWIDTH=13.5 MHz) 30.9K2 7502 AD811 5004 0.1ul 100F7 +12V25v V100uF Figure 2.3 As noted, this technique can be applied to virtually any amplifier, which is a major reason why it is so useful. It is shown here with a current feedback amplifier suitable for high current line driving, the AD811, and it consists of just the simple (passive) series isolation resistor, Rx. This resistors minimum value for stability will vary from device to device, so the amplifier data sheet should be consulted for other ICs. Generally, information will be provided as to the amount of load capacitance tolerated, and a suggested minimum resistor value for stability
5 excessive phase lag. However with RD connected, the higher amplifier noise gain produces a new 1/ß - open loop rolloff intersection, about a decade lower in frequency. This is set low enough that the extra phase lag from CLis no longer a problem, and amplifier stability is restored. A drawback to this trick is that the DC offset and input noise of the amplifier are raised by the value of the noise gain, when the optional CD is not present. But, when CD is used in series with RD, the offset voltage of the amplifier is not raised, and the gained-up AC noise components are confined to a frequency region above 1/(2pi•RD•CD). A further caution is that the technique can be somewhat tricky when separating these operating DC and AC regions, and should be applied carefully with regard to settling time (Reference 2). Note that these simplified examples are generic, and in practice the absolute component values should be matched to a specific amplifier. “Passive” cap load compensation, shown in Figure 2.3, is the most simple (and most popular) isolation technique available. It uses a simple “out-of-the-loop” series resistor RX to isolate the cap load, and can be used with any amplifier, current or voltage feedback, FET or bipolar input. OPEN-LOOP SERIES RESISTANCE ISOLATES CAPACITIVE LOAD FOR AD811 CURRENT FEEDBACK OP AMP (CIRCUIT BANDWIDTH = 13.5 MHz) Figure 2.3 As noted, this technique can be applied to virtually any amplifier, which is a major reason why it is so useful. It is shown here with a current feedback amplifier suitable for high current line driving, the AD811, and it consists of just the simple (passive) series isolation resistor, RX. This resistor’s minimum value for stability will vary from device to device, so the amplifier data sheet should be consulted for other ICs. Generally, information will be provided as to the amount of load capacitance tolerated, and a suggested minimum resistor value for stability purposes