Vrej Barkhor oweMsegude.Ca Discrete power MOSFETs employ ser circuits,although the device geometry,voltage and current devices.The metal oxide semiconductor field effect p-Substrate tra he 70s.Figure 1 shows the device schematic,transfer (a) characterist of the MOSFET was partly driven by the limitations of bip olar power sistors(BJTs) device of choice in .er s the electronics applications. 0 (b) we will loosely refer to the fatealeiia0viR The bipola istor is large base dri as on keep the device in the ON ired to state. (c) Also.higher Figure 1.Power MOSFET(a)Schematic,(b)Transfer Characteristics,(c) curre Device Symbo fast turn-off.Despite the very advanced state of manufacturability and lower costs of BJTs,these aave made the base drive circuit design more complicated and hence more expensive than the
Power MOSFET Basics Vrej Barkhordarian, International Rectifier, El Segundo, Ca. Discrete power MOSFETs employ semiconductor processing techniques that are similar to those of today's VLSI circuits, although the device geometry, voltage and current levels are significantly different from the design used in VLSI devices. The metal oxide semiconductor field effect transistor (MOSFET) is based on the original field-effect transistor introduced in the 70s. Figure 1 shows the device schematic, transfer characteristics and device symbol for a MOSFET. The invention of the power MOSFET was partly driven by the limitations of bipolar power junction transistors (BJTs) which, until recently, was the device of choice in power electronics applications. Although it is not possible to define absolutely the operating boundaries of a power device, we will loosely refer to the power device as any device that can switch at least 1A. The bipolar power transistor is a current controlled device. A large base drive current as high as one-fifth of the collector current is required to keep the device in the ON state. Also, higher reverse base drive currents are required to obtain fast turn-off. Despite the very advanced state of manufacturability and lower costs of BJTs, these limitations have made the base drive circuit design more complicated and hence more expensive than the power MOSFET. Source Contact Field Oxide Gate Oxide Gate Metallization Drain Contact n* Drain p-Substrate Channel n* Source t ox l VGS VT 0 0 I D (a) (b) I D D SB (Channel or Substrate) S G (c) Figure 1. Power MOSFET (a) Schematic, (b) Transfer Characteristics, (c) Device Symbol
Another BIT limitation is that both electrons and holes contribute to conduction.Presence of holes with their higher 20001 carrier lifetime cau 150 the an Tepeo forward voltage drop decreases with increasing temperature 00( causing diversion of current to a single device when several 500 devices are paralleled.Power MOSFETs.on the other hand. MOS are 0 10 10 ing power losses are im ortant.Plus.they can withstand simultan f high current and voltage without e failure Figure ue to cond bi wn.Power Limitations of MOSFETs and BJTs. the voltage dron increases with increasing temperature ensu ing an even distribution of current among all components. on-state volt the powe er MOSFET becomes to use the bipolar power transistor at the exp nse of worse high fre e performance.Figure 2 shows the present current-voltage limitations of power MOSFETs and BJTs.Over time,new materials, structures and processing techniques are expected to raise these limits. Source p*Body Reglon Drift Region n'Epi Layer Drain Figure 3.Schematic Diagram for an n-Channel Power MOSFET and the Device
Another BJT limitation is that both electrons and holes contribute to conduction. Presence of holes with their higher carrier lifetime causes the switching speed to be several orders of magnitude slower than for a power MOSFET of similar size and voltage rating. Also, BJTs suffer from thermal runaway. Their forward voltage drop decreases with increasing temperature causing diversion of current to a single device when several devices are paralleled. Power MOSFETs, on the other hand, are majority carrier devices with no minority carrier injection. They are superior to the BJTs in high frequency applications where switching power losses are important. Plus, they can withstand simultaneous application of high current and voltage without undergoing destructive failure due to second breakdown. Power MOSFETs can also be paralleled easily because the forward voltage drop increases with increasing temperature, ensuring an even distribution of current among all components. However, at high breakdown voltages (>200V) the on-state voltage drop of the power MOSFET becomes higher than that of a similar size bipolar device with similar voltage rating. This makes it more attractive to use the bipolar power transistor at the expense of worse high frequency performance. Figure 2 shows the present current-voltage limitations of power MOSFETs and BJTs. Over time, new materials, structures and processing techniques are expected to raise these limits. 2000 1500 1000 500 0 1 10 100 1000 Maximum Current (A) Holdoff Voltage (V) Bipolar Transistors MOS Figure 2. Current-Voltage Limitations of MOSFETs and BJTs. Drain Metallization Drain n+ Substrate (100) n- Epi Layer Channels n+ n p + p+ Body Region p+ Drift Region G S D Source Gate Oxide Polysilicon Gate Source Metallization Figure 3. Schematic Diagram for an n-Channel Power MOSFET and the Device
Figure 3 shows schematic diagram and figure 4 shows the physical origin of the parasitic components in an n-channel power MOSFET.The parasitic JFET appearing between the two body implants restricts current flow when the depletion wid acent body diodes extend into the drift region with ain vol ge.T RB must b levice sus sced thr thon-on doping and distance under the source region.There are several parasitic capacitances associated with the power MOSFET as shown in Figure 3. Ccs is the capacitance due to the overlap of the source and the channel regions by the polysilicon gate and is independent of applied voltage.CcD consists of two parts.the first is the capacitance associated with the overlap of the polysilicon gate and the silicon underneath in the JFET region.The second part is the capacitance associated with the depletion region immediately under the gate.CcD is a nonlinear function of voltage.Finally,Cps,the capacitance associated with the body-drift diode,varies inversely with the square root of the drain-source bias.There are currently two designs of power MOSFETs,usually to as the pla r and the trench designs. The plan ign has already been introduced in the technology has the ac ntage of higher cell density ore device. LTO gsm 本 CGS1 BJT Cos nEpi Layer n'Substrate Figure 4.Power MOSFET Parasitic Components
Figure 3 shows schematic diagram and Figure 4 shows the physical origin of the parasitic components in an n-channel power MOSFET. The parasitic JFET appearing between the two body implants restricts current flow when the depletion widths of the two adjacent body diodes extend into the drift region with increasing drain voltage. The parasitic BJT can make the device susceptible to unwanted device turn-on and premature breakdown. The base resistance RB must be minimized through careful design of the doping and distance under the source region. There are several parasitic capacitances associated with the power MOSFET as shown in Figure 3. CGS is the capacitance due to the overlap of the source and the channel regions by the polysilicon gate and is independent of applied voltage. CGD consists of two parts, the first is the capacitance associated with the overlap of the polysilicon gate and the silicon underneath in the JFET region. The second part is the capacitance associated with the depletion region immediately under the gate. CGD is a nonlinear function of voltage. Finally, CDS, the capacitance associated with the body-drift diode, varies inversely with the square root of the drain-source bias. There are currently two designs of power MOSFETs, usually referred to as the planar and the trench designs. The planar design has already been introduced in the schematic of Figure 3. Two variations of the trench power MOSFET are shown Figure 5. The trench technology has the advantage of higher cell density but is more difficult to manufacture than the planar device. Metal CGS2 Cgsm LTO CGD RCh CGS1 RB BJT n- p- CDS JFET REPI n- n- Epi Layer n- Substrate Figure 4. Power MOSFET Parasitic Components
BREAKDOWN VOLTAGE Breakdown voltage is the volt e at which the reverse-biased body-drift diode breaks dran the e characteristics of a Electron Flow edat 250uA drain current for drain voltages below BVpss and with no bias on the gate.no channel is the surface voltage is entirely rce supported by the rev ion.Tbody phenomena can occur in Oxide poorly designed and processed devices: rough and thoughiso8enench- n'Epl Layer Channel when the depletion source side nction ache source region at drain voltages below the rated avalan he voltage of the source and drain and uses a breakdown acter 7.Th WI. Figure 5.Trench MOSFET current flowing betwe source and drain is denoted by Ipss.There are tradeoffs to be made between Rpsion)that requires shorter channel lengths and punch-through avoidance that requires longer channel lengths. The reach-thr omenon occurs whe epletio th n region on the e drift side of the bo dy-drift p-n depletion edge enters the high carrier concentration substrate,a further increase in drain voltage will cause the electric field to quickly reach the critical value of 2x105 V/cm where avalanching begins
BREAKDOWN VOLTAGE Breakdown voltage, BVDSS, is the voltage at which the reverse-biased body-drift diode breaks down and significant current starts to flow between the source and drain by the avalanche multiplication process, while the gate and source are shorted together. Current-voltage characteristics of a power MOSFET are shown in Figure 6. BVDSS is normally measured at 250µA drain current. For drain voltages below BVDSS and with no bias on the gate, no channel is formed under the gate at the surface and the drain voltage is entirely supported by the reverse-biased body-drift p-n junction. Two related phenomena can occur in poorly designed and processed devices: punch-through and reach-through. Punchthrough is observed when the depletion region on the source side of the body-drift p-n junction reaches the source region at drain voltages below the rated avalanche voltage of the device. This provides a current path between source and drain and causes a soft breakdown characteristics as shown in Figure 7. The leakage current flowing between source and drain is denoted by IDSS. There are tradeoffs to be made between RDS(on) that requires shorter channel lengths and punch-through avoidance that requires longer channel lengths. The reach-through phenomenon occurs when the depletion region on the drift side of the body-drift p-n junction reaches the epilayer-substrate interface before avalanching takes place in the epi. Once the depletion edge enters the high carrier concentration substrate, a further increase in drain voltage will cause the electric field to quickly reach the critical value of 2x105 V/cm where avalanching begins. Source Gate Source Gate Oxide Channel Oxide n- Epi Layer n+ Substrate (100) Drain (b) S G S Electron Flow D (a) Figure 5. Trench MOSFET (a) Current Crowding in V-Groove Trench MOSFET, (b) Truncated V-Groove MOSFET
ON-RESISTANCE The on-state resistance of a power MOSFET is made up of several components as shown in Figure 8: RDS(on)=Rsource +Rch +RA +RJ+RD +Rsub +Rweml (1) where: Rsource=Source diffusion resistance Rch=Channel resistance RA=Accumulation resistance R="JFET"C eof the (J: Rp=Drift region resistance 20 Eaub Wafers with substrate resistivities of up to 20m0-cm are used for high voltage bigi0esethan5aacmoiow 15 Rwcml =Sum e,the 5 and drain Metallization and the silicon, metallization and Leadframe ggblenihehoteere Ios VS Vos LOCUS car Figure 9 shows the relative importance of age s gl oages the Rp 2 devices due to the higher resistivity or 1 lower background carrier concentration in 10 the epi.At lower voltages.the Rpstn is dominate d by the Drain Voltage (Volts) ce and tal t Fom th Figure 6.Current-Voltage Characteristics of Power MOSFET bond wires and leadframe.The substrate contribution becomes more significant for lower breakdown voltage devices. TRANSCONDUCTANCE Transconductance,gfs,is a measure of the sensitivity of drain cu rrent to char nge s in rce bias This n drain c ent equal to ne half of the maximum current rating value and for a VDS that ensures operation in the constant current region. Transconductance is influenced by gate width,which increases in proportion to the active area as cell density increases ensity ha s increased over the yearsfro und half on per square inch in 198 aroun gnt m ell dmar on Ior t ren siti and th allows contacts to e made to the source in the center of the cels
ON-RESISTANCE The on-state resistance of a power MOSFET is made up of several components as shown in Figure 8: (1) where: Rsource = Source diffusion resistance Rch = Channel resistance RA = Accumulation resistance RJ = "JFET" component-resistance of the region between the two body regions RD = Drift region resistance Rsub = Substrate resistance Wafers with substrate resistivities of up to 20mΩ-cm are used for high voltage devices and less than 5mΩ-cm for low voltage devices. Rwcml = Sum of Bond Wire resistance, the Contact resistance between the source and drain Metallization and the silicon, metallization and Leadframe contributions. These are normally negligible in high voltage devices but can become significant in low voltage devices. Figure 9 shows the relative importance of each of the components to RDS(on) over the voltage spectrum. As can be seen, at high voltages the RDS(on) is dominated by epi resistance and JFET component. This component is higher in high voltage devices due to the higher resistivity or lower background carrier concentration in the epi. At lower voltages, the RDS(on) is dominated by the channel resistance and the contributions from the metal to semiconductor contact, metallization, bond wires and leadframe. The substrate contribution becomes more significant for lower breakdown voltage devices. TRANSCONDUCTANCE Transconductance, gfs, is a measure of the sensitivity of drain current to changes in gate-source bias. This parameter is normally quoted for a Vgs that gives a drain current equal to about one half of the maximum current rating value and for a VDS that ensures operation in the constant current region. Transconductance is influenced by gate width, which increases in proportion to the active area as cell density increases. Cell density has increased over the years from around half a million per square inch in 1980 to around eight million for planar MOSFETs and around 12 million for the trench technology. The limiting factor for even higher cell densities is the photolithography process control and resolution that allows contacts to be made to the source metallization in the center of the cells. R R R R RR R R DS(on source ch A J D sub wcml ) = + + ++ + + Gate Voltage 7 6 5 4 I DS VS VDS LOCUS 3 2 1 0 5 10 15 0 5 10 15 20 25 (Saturation Linear Region Region) Normalized Drain Current Drain Voltage (Volts) Figure 6. Current-Voltage Characteristics of Power MOSFET