7.5nH inductor(simulating package pin and wirebond inductance), a 10pF fixed capacitor, and a diode having a 6pF zero-bias junction capacitance(CJo). The tota input capacitance changes from 16pF(OV input)to 12.5pF(2V input)as shown in Figure 4.18. The 50ohm series resistor, Rs, is required to isolate the wideband op amp output from the flash converter input capacitance. Selecting the correct value for the series resistance is critical. If it is too low the wideband. low-distortion amp may be unstable because of the flash converter capacitive load. If it is too large the distortion due to the non-linear input impedance may become significant, and and the input capacitance Data sheets for wideband low distortion amplifier sistor bandwidth will be reduced because of the lowpass filter formed by the series re generally have curves showing the optimum value of series resistance as a function of the load capacitance. Typical recommended resistor values range from about 10ohms to 100ohms, depending on the amplifier and the load capacitance In the model, a value of 50ohm was chosen. Figure 4. 19 shows the simulated THD produced by the equivalent circuit(assuming an ideal op amp of course) TYPICAL FLASH ADC BLOCK DIAGRAM STROBE ANALO INPUT DIGITA R 05R Figure 4.17
1 6 7.5nH inductor (simulating package pin and wirebond inductance), a 10pF fixed capacitor, and a diode having a 6pF zero-bias junction capacitance (CJO). The total input capacitance changes from 16pF (0V input) to 12.5pF (–2V input) as shown in Figure 4.18. The 50ohm series resistor, Rs , is required to isolate the wideband op amp output from the flash converter input capacitance. Selecting the correct value for the series resistance is critical. If it is too low, the wideband, low-distortion op amp may be unstable because of the flash converter capacitive load. If it is too large, the distortion due to the non-linear input impedance may become significant, and bandwidth will be reduced because of the lowpass filter formed by the series resistor and the input capacitance. Data sheets for wideband low distortion amplifiers generally have curves showing the optimum value of series resistance as a function of the load capacitance. Typical recommended resistor values range from about 10ohms to 100ohms, depending on the amplifier and the load capacitance. In the model, a value of 50ohm was chosen. Figure 4.19 shows the simulated THD produced by the equivalent circuit (assuming an ideal op amp, of course). TYPICAL FLASH ADC BLOCK DIAGRAM Figure 4.17
FLASH ADC INPUT MODEL SHOWS CAPACITANCE IS A FUNCTION OF INPUT SIGNAL FLASH CONVERTER 50Q 7.5nH INPUT RANGE T O.2V INPU 15pF INPUT VOLTAGE Figure 4.18 ADC TOTAL HARMONIC DISTORTION VERSUS INPUT FREQUENCY AS PREDICTED BY MODEL THD(dBc) 10 FULLSCALE INPUT FREQUENCY(MHz) Figure 4.19
1 7 FLASH ADC INPUT MODEL SHOWS CAPACITANCE IS A FUNCTION OF INPUT SIGNAL Figure 4.18 ADC TOTAL HARMONIC DISTORTION VERSUS INPUT FREQUENCY AS PREDICTED BY MODEL Figure 4.19
DRIVING THE AD9050 SINGLE-SUPPLY 10-BIT 40MSPS ADC The AD9050 is a 10-bit, 40MSPS single supply adC designed for wide dynamic range applications such as ultrasound, instrumentation, digital communications, and professional video. a block diagram of the AD9050 (Figure 4.20)illustrates the two-step subranging architecture, and key specifications are summarized in Figure AD9050 10-BIT 40MSPS SINGLE SUPPLY ADC VREFOUT O ANDGAP REFERENCE REFe O LOGIC AD9050 Figure 4.20
1 8 DRIVING THE AD9050 SINGLE-SUPPLY 10-BIT, 40MSPS ADC The AD9050 is a 10-bit, 40MSPS single supply ADC designed for wide dynamic range applications such as ultrasound, instrumentation, digital communications, and professional video. A block diagram of the AD9050 (Figure 4.20) illustrates the two-step subranging architecture, and key specifications are summarized in Figure 4.21. AD9050 10-BIT, 40MSPS SINGLE SUPPLY ADC Figure 4.20
AD9050 10-BIT 40MSPS ADC KEY SPECIFICATIONS 10-Bits, 40MSPS, Single +5V Supply Selectable Digital Supply: +5v, or+3v Low Power 300mW on bicMos Process On-Chip SHA and +2. 5v reference 56dB s/(N+D),9 Effective Bits, with 103MHz Input Signal No input transients, Input Impedance 5kQ2, 5pF Input Range +3.3v+0. 5v single-Ended or Differential 28-pin SOIC /SSOP Packages Ideal for Digital Beamforming Ultrasound Systems Figure 4.21 The analog input circuit of the AD9050(see Figure 4.22)is differential, but can be driven either single-endedly or differentially with equal performance. The input signal range of the AD9050 is #0. 5V centered around a common-mode voltage of +3.3V. AD9050 SIMPLIFIED INPUT CIRCUIT Bko INPUT BUFFER AIN(B) 16k 16k INPUT RANGE: +3.3V±0.5V Figure 4.22 The input circuit of the AD9050 is a relatively benign and constant 5kQ2 in parallel with approximately 5pF. Because of its well-behaved input, the AD9050 can be driven directly from 50, 75, or 100ohm sources without the need for a low-distortion buffer amplifier In ultrasound applications, it is normal to ac couple the signal (generally between IMHz and 15MHz) into the AD9050 differential inputs using a wideband transformer as shown in Figure 4.23(A). Signal-to-noise plus distortion (S/N+D)values of 57dB (9.2 ENOB) are typical for a 10MHz input signal. If the
1 9 AD9050 10-BIT, 40MSPS ADC KEY SPECIFICATIONS 10-Bits, 40MSPS, Single +5V Supply Selectable Digital Supply: +5V, or +3V Low Power: 300mW on BiCMOS Process On-Chip SHA and +2.5V reference 56dB S/(N+D), 9 Effective Bits, with 10.3MHz Input Signal No input transients, Input Impedance 5k , 5pF Input Range +3.3V 0.5V Single-Ended or Differential 28-pin SOIC / SSOP Packages Ideal for Digital Beamforming Ultrasound Systems Figure 4.21 The analog input circuit of the AD9050 (see Figure 4.22) is differential, but can be driven either single-endedly or differentially with equal performance. The input signal range of the AD9050 is ±0.5V centered around a common-mode voltage of +3.3V. AD9050 SIMPLIFIED INPUT CIRCUIT Figure 4.22 The input circuit of the AD9050 is a relatively benign and constant 5kW in parallel with approximately 5pF. Because of its well-behaved input, the AD9050 can be driven directly from 50, 75, or 100ohm sources without the need for a low-distortion buffer amplifier. In ultrasound applications, it is normal to ac couple the signal (generally between 1MHz and 15MHz) into the AD9050 differential inputs using a wideband transformer as shown in Figure 4.23 (A). Signal-to-noise plus distortion (S/N+D) values of 57dB (9.2 ENOB) are typical for a 10MHz input signal. If the
input signal comes directly from a 50, 75, or 100ohm single-ended source, capacitive coupling as shown in Figure 4.23(B)can be used AC COUPLING INTO THE INPUT OF THE AD9050 ADC TRANSFO CAPACITIVE Figure 4.23 DRIVING ADCS WITH SWITCHED CAPACITOR INPUTS Many ADCs, including fast sampling ones, have switched capacitor input circuits Not only can the effective input impedance be a function of the sampling rate, but the switches(usually cmos) may inject charge on the Adc s analog input. For instance, the internal track-and-hold amplifier (THa) may generate a current spike on the analog input when it switches from the track mode to the hold mode, and vice versa. Other spikes may be generated during the actual conversion. These fast current spikes appear on the output of the external adc drive amplifier, producing corresponding voltage spikes(because of the closed-loop high frequency op amp output impedance), and conversion errors will result if the amplifier settling time to them is not adequate The AD876 is a 10-bit, 20MSPS, low power(150mW), CMOS ADC with a switched capacitor track-and-hold input circuit. The overall block diagram of the ADC is shown in Figure 4.24, and key specifications are given in Figure 4.25
2 0 input signal comes directly from a 50, 75, or 100ohm single-ended source, capacitive coupling as shown in Figure 4.23 (B) can be used. AC COUPLING INTO THE INPUT OF THE AD9050 ADC Figure 4.23 DRIVING ADCS WITH SWITCHED CAPACITOR INPUTS Many ADCs, including fast sampling ones, have switched capacitor input circuits. Not only can the effective input impedance be a function of the sampling rate, but the switches (usually CMOS) may inject charge on the ADC's analog input. For instance, the internal track-and-hold amplifier (THA) may generate a current spike on the analog input when it switches from the track mode to the hold mode, and vice versa. Other spikes may be generated during the actual conversion. These fast current spikes appear on the output of the external ADC drive amplifier, producing corresponding voltage spikes (because of the closed-loop high frequency op amp output impedance), and conversion errors will result if the amplifier settling time to them is not adequate. The AD876 is a 10-bit, 20MSPS, low power (150mW), CMOS ADC with a switched capacitor track-and-hold input circuit. The overall block diagram of the ADC is shown in Figure 4.24, and key specifications are given in Figure 4.25