ComputerArchitectureMemory Hierarchy and CacheComputerArchitecture
Computer Architecture Computer Architecture Memory Hierarchy and Cache
Why Are You Here for This Course?"C" as a model of computationC ProgrammingProgrammer'sviewofacomputersystemworksHowdoesanassemblyArchitect/microarchitect'sview.program end up executing asHowtodesignacomputerthatdigital logic?meetssystemdesignqoalsChoicescriticallyaffectbothWhat happens in-between?theSWprogrammerandtheHWdesignerHowisacomputerdesignedusing logic gates and wires tosatisfy specific goals?HWdesigner'sview ofacomputersystemworksLogic DesignDigital logic as amodelofcomputationComputerArchitecture
Computer Architecture • How does an assembly program end up execu4ng as digital logic? • What happens in-between? • How is a computer designed using logic gates and wires to sa4sfy specific goals? C Programming Logic Design “C” as a model of computation Digital logic as a model of computation Programmer’s view of a computer system works HW designer’s view of a computer system works Architect/microarchitect’s view: How to design a computer that meets system design goals. Choices critically affect both the SW programmer and the HW designer Why Are You Here for This Course?
IdealismPipelineInstructionData(InstructionSupplySupplyexecution)- No pipeline stalls-Zero-cycle latency-Zero-cyclelatency-Perfectdataflow-Infinite capacity- Infinite capacity(reg/memory dependencies)- Zero cost-Infinitebandwidth-Zero-cycle interconnect(operand communication)-Perfectcontrolflow- Zero cost-Enoughfunctional units-Zero latency computeComputerArchitecture
Computer Architecture Idealism 3 Instruction Supply Pipeline (Instruction execution) Data Supply - Zero-cycle latency - Infinite capacity - Zero cost - Perfect control flow - No pipeline stalls -Perfect data flow (reg/memory dependencies) - Zero-cycle interconnect (operand communication) - Enough functional units - Zero latency compute - Zero-cycle latency - Infinite capacity - Infinite bandwidth - Zero cost
The Memory HierarchyComputerArchitecture
Computer Architecture The Memory Hierarchy
Memorv in a Modern SvstemL2CACHE1L2CACHESHAREDL3CACHE品COREOCORE1DRAMBANKS0DRAMMEMORYLCACHEACECACHECORE2CORE3咖NComputerArchitecture
Computer Architecture Memory in a Modern System 5 EQTG"3" N4"ECEJG"2" UJCTGF"N5"ECEJG" FTCO"KPVGTHCEG" EQTG"2" EQTG"4" EQTG"5" N4"ECEJG"3" N4"ECEJG"4" N4"ECEJG"5" FTCO"DCPMU" DRAM MEMORY CONTROLLER