intersi cL7106,|CL7107 /cL7106S,CL7107s 3/2 Digit January 1998 LCD/LED Display, A/D Converters Features Description Guaranteed Zero Reading for oV Input on All Scale The Intersil ICL7106 and ICL7107 are high performance, low True Polarity at Zero for Precise Null Detection power, 372 digit A/D converters. Included are seven seg- 1pA Typical Input Current ment decoders, display drivers, a reference, and a clock The ICL7106 is designed to interface with a liquid crystal dis- True Differential Input and Reference Direct Display Drive play(LCD)and includes a multiplexed backplane drive; the LCD ICL7106 LED ICL7107 ICL7107 will directly drive an instrument size light emitting Low Noise-Less Than 15uVp-p diode(LED) display The ICL7106 and ICL7107 bring together a combination of On Chip clock and Reference high accuracy, versatility, and true economy. It features auto- Low Power Dissipation- Ty pically Less Than 10mW zero to less than 10uV, zero drift of less than 1uvroC, input bias current of 10pA(Max), and rollover error of less than No Additional Active Circuits Required one count. True differential inputs and reference are useful in Enhanced Display Stability(ICL7106S, ICL7107S) all systems, but give the designer an uncommon advantage when measuring load cells, strain gauges and other bridge Ordering Information type transducers. Finally, the true economy of single power supply operation(ICL7106), enables a high performance TEMP panel meter to be built with the addition of only 10 passive PART NO.RANGE(C) PACKAGE PKG. No. components and a display 0 to 70 40 Ld PDIP E40.6 CL7106RCPL 0 to 7040 Ld PDIP(Note)E40.6 ICL7106CM44 0 to 70 44 Ld MOFP a4410×10 ICL7106SCPL 0 to 7040 Ld PDIP E40.6 ICL7107SCPL 0 to 70 40 Ld PDIP E40.6 o to 7040 Ld PDIP CL7107RCPL 0 to 7040 Ld PDIP(Note)E40.6 CL7107CM44 0 to 7044 Ld MOFP Q44.10X10 NOTE: "R"indicates device with reversed leads for mounting to PC board underside. "s" indicates enhanced stabil CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures. ile number 3082.2 http://www.intersil.comor407-727-9207iCopyrighteIntersilCorporation1999
1 ICL7106, ICL7107, ICL7106S, ICL7107S 31/2 Digit, January 1998 LCD/LED Display, A/D Converters Features • Guaranteed Zero Reading for 0V Input on All Scales • True Polarity at Zero for Precise Null Detection • 1pA Typical Input Current • True Differential Input and Reference, Direct Display Drive - LCD ICL7106, LED lCL7107 • Low Noise - Less Than 15µVP-P • On Chip Clock and Reference • Low Power Dissipation - Typically Less Than 10mW • No Additional Active Circuits Required • Enhanced Display Stability (ICL7106S, ICL7107S) Description The Intersil ICL7106 and ICL7107 are high performance, low power, 31/2 digit A/D converters. Included are seven segment decoders, display drivers, a reference, and a clock. The ICL7106 is designed to interface with a liquid crystal display (LCD) and includes a multiplexed backplane drive; the ICL7107 will directly drive an instrument size light emitting diode (LED) display. The ICL7106 and ICL7107 bring together a combination of high accuracy, versatility, and true economy. It features autozero to less than 10µV, zero drift of less than 1µV/oC, input bias current of 10pA (Max), and rollover error of less than one count. True differential inputs and reference are useful in all systems, but give the designer an uncommon advantage when measuring load cells, strain gauges and other bridge type transducers. Finally, the true economy of single power supply operation (ICL7106), enables a high performance panel meter to be built with the addition of only 10 passive components and a display. Ordering Information PART NO. TEMP. RANGE (oC) PACKAGE PKG. NO. ICL7106CPL 0 to 70 40 Ld PDIP E40.6 ICL7106RCPL 0 to 70 40 Ld PDIP (Note) E40.6 ICL7106CM44 0 to 70 44 Ld MQFP Q44.10x10 ICL7106SCPL 0 to 70 40 Ld PDIP E40.6 ICL7107SCPL 0 to 70 40 Ld PDIP E40.6 ICL7107CPL 0 to 70 40 Ld PDIP E40.6 ICL7107RCPL 0 to 70 40 Ld PDIP (Note) E40.6 ICL7107CM44 0 to 70 44 Ld MQFP Q44.10x10 NOTE: “R” indicates device with reversed leads for mounting to PC board underside. “S” indicates enhanced stability. CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures. http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999 File Number 3082.2
cL7106,cL7107,cL7106s,|cL7107S inout ICL7106, ICL7107(PDIP) ICL7106R, ICL7107R(PDIP TOP VIEW TOP VIEW 00sc1 的9]osc2 c13 图80Sc3 OSC 33 38C1 37] TEST B1 (1s)A1[1 B6】REFH BA1}(1s) F1[6 35 REF LO EFLO 6 图F1 3 图3]cREr D2 32 COMMON COMMON 9 32D2 B1 IN HI IN LO 11 国4 A-Z 12 28BUFF 区NT 26]. G2(10s) G2(10s) 西F3(100y E3[8 (100sA3图8 (1000AB4的9 22】(1000AB4 四 BP/GND ICL7106, ICL7107(MQFP) TOP VIEW 出88 4342414039383736 Nc TESTLI OSc A的 osc2□ BP/GND ■Po D1口 IE3 c1口口 1314151 18192021
2 Pinouts ICL7106, ICL7107 (PDIP) TOP VIEW ICL7106R, ICL7107R (PDIP) TOP VIEW ICL7106, ICL7107 (MQFP) TOP VIEW 13 1 2 3 4 5 6 7 8 9 10 11 12 14 15 16 17 18 19 20 V+ D1 C1 B1 A1 F1 G1 E1 D2 C2 B2 A2 F2 E2 D3 B3 F3 E3 (1000) AB4 POL 28 40 39 38 37 36 35 34 33 32 31 30 29 27 26 25 24 23 22 21 OSC 1 OSC 2 OSC 3 TEST REF HI REF LO CREF+ CREFCOMMON IN HI IN LO A-Z BUFF INT V- G2 (10’s) C3 A3 G3 BP/GND (1’s) (10’s) (100’s) (MINUS) (100’s) 13 1 2 3 4 5 6 7 8 9 10 11 12 14 15 16 17 18 19 20 V+ D1 C1 B1 A1 F1 G1 E1 D2 C2 B2 A2 F2 E2 D3 B3 F3 E3 (1000) AB4 POL 28 40 39 38 37 36 35 34 33 32 31 30 29 27 26 25 24 23 22 21 OSC 1 OSC 2 OSC 3 TEST REF HI REF LO CREF+ CREFCOMMON IN HI IN LO A-Z BUFF INT V- G2 (10’s) C3 A3 G3 BP/GND (1’s) (10’s) (100’s) (MINUS) (100’s) OSC 2 NC OSC 3 TEST NC NC 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 OSC 1 V+ D1 C1 B1 A1 F1 G1 E1 D2 C2 28 27 26 25 24 23 18 19 20 21 22 B2 A2 F2 E2 D3 B3 F3 E3 AB4 POL BP/GND 39 38 37 36 35 34 33 32 31 30 29 44 43 42 41 40 IN HI IN LO A-Z BUFF INT V- NC G2 C3 A3 G3 REF HI REF LO CREF+ CREFCOMMON ICL7106, ICL7107, ICL7106S, ICL7107S
cL7106,cL7107,cL7106s,|cL7107S Absolute Maximum Ratings Thermal Information Supply Voltage Thermal Resistance(Typical, Note 2) 0JA CCM) ICL7106. V+ to v- PDIP Package ICL7107. V+ to GND 6 ICL7107.V-to GND -9v Maximum Junction Temperature Analog Input voltage(Either Input)(Note 1) V+ to V- Maximum Storage Temperature Range -65°cto150° Reference Input Voltage(Either Input) V+ to V- Maximum Lead Temperature(Soldering 10s) Clock Input MQFP-Lead Tips Only CL7106 TEST to V+ ICL71 Operating Conditions Temperature Range 0cto7o°c CAUTION: Stresses above those listed in Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation the device at these or any other conditions above those indicated in the operational sections of this specification is not implied NOTES: ut current Is 2. BJA is measured with the component mounted on an evaluation PC board in free air Electrical Specifications ( Note 3) PARAMETER TEST CONDITIONS TYP MAX UNIT SYSTEM PERFORMANCE Zero Input Reading VIN=0.0V, Full Scale= 200mV 0000±0000+0000 Digital Stability(Last Digit)(ICL7106S, ICL7107s Fixed Input Voltage( Note 7) 000d0000000gita Ratiometric Reading VIN= VREF, VREF =100mV 999999/101000 Rollover Errol Difference in Reading for Equal Positive and Negative Inputs Near Full Scale Linearity Full scale 200mv or Full scale 2V Maximum ±0.2 Counts Deviation from Best Straight Line Fit(Note 6) Common Mode Rejection Ratio CM=1V, VIN=OV, Full Scale 200mV(Note 6) ViN=oV, Full Scale= 200mV 15 ( Peak-To-Peak value Not Exceeded 95% of Time) Leakage] Input VIN =0(Note 6) 10 pA Zero Reading Drift VN=0,0°cTo70°c(Note6) Scale Factor Temperature Coefficient VN=199mV,0°cTo70°c, ppmn°c ( Ext. Ref0ppm/°C) End Power Supply Character V+ Supply VIN=O(Does Not Indlude LED Current for ICL7107) 1.0 18 mA Current End Power Supply Character V Supply Current ICL7107 Only 0618 COMMON Pin Analog Common Voltage Temperature Coefficient of Analog Common 25kQ2 Between DISPLAY DRIVER ICL7106 ONLY Peak-To-Peak Segment Drive Voltage V+= to v-= 9v(Note 5) 5.5 Peak-To-Peak Backplane Drive Voltage
3 Absolute Maximum Ratings Thermal Information Supply Voltage ICL7106, V+ to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15V ICL7107, V+ to GND. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6V ICL7107, V- to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-9V Analog Input Voltage (Either Input) (Note 1). . . . . . . . . . . . . V+ to VReference Input Voltage (Either Input) . . . . . . . . . . . . . . . . . V+ to VClock Input ICL7106 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TEST to V+ ICL7107 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .GND to V+ Operating Conditions Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . . .0oC to 70oC Thermal Resistance (Typical, Note 2) θJA (oC/W) PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 MQFP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80 Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . 150oC Maximum Storage Temperature Range . . . . . . . . . .-65oC to 150oC Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300oC (MQFP - Lead Tips Only) CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTES: 1. Input voltages may exceed the supply voltages provided the input current is limited to ±100µA. 2. θJA is measured with the component mounted on an evaluation PC board in free air. Electrical Specifications (Note 3) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT SYSTEM PERFORMANCE Zero Input Reading VIN = 0.0V, Full Scale = 200mV -000.0 ±000.0 +000.0 Digital Reading Stability (Last Digit) (ICL7106S, ICL7107S Only) Fixed Input Voltage (Note 7) -000.0 ±000.0 +000.0 Digital Reading Ratiometric Reading VlN = VREF, VREF = 100mV 999 999/10 00 1000 Digital Reading Rollover Error -VIN = +VlN ≅ 200mV Difference in Reading for Equal Positive and Negative Inputs Near Full Scale - ±0.2 ±1 Counts Linearity Full Scale = 200mV or Full Scale = 2V Maximum Deviation from Best Straight Line Fit (Note 6) - ±0.2 ±1 Counts Common Mode Rejection Ratio VCM = 1V, VIN = 0V, Full Scale = 200mV (Note 6) - 50 - µV/V Noise VIN = 0V, Full Scale = 200mV (Peak-To-Peak Value Not Exceeded 95% of Time) - 15 - µV Leakage Current Input VlN = 0 (Note 6) - 1 10 pA Zero Reading Drift VlN = 0, 0oC To 70oC (Note 6) - 0.2 1 µV/oC Scale Factor Temperature Coefficient VIN = 199mV, 0oC To 70oC, (Ext. Ref. 0ppm/oC) (Note 6) - 1 5 ppm/oC End Power Supply Character V+ Supply Current VIN = 0 (Does Not Include LED Current for ICL7107) - 1.0 1.8 mA End Power Supply Character V- Supply Current ICL7107 Only - 0.6 1.8 mA COMMON Pin Analog Common Voltage 25kΩ Between Common and Positive Supply (With Respect to + Supply) 2.4 3.0 3.2 V Temperature Coefficient of Analog Common 25kΩ Between Common and Positive Supply (With Respect to + Supply) - 80 - ppm/oC DISPLAY DRIVER ICL7106 ONLY Peak-To-Peak Segment Drive Voltage Peak-To-Peak Backplane Drive Voltage V+ = to V- = 9V (Note 5) 4 5.5 6 V ICL7106, ICL7107, ICL7106S, ICL7107S
cL7106,cL7107,cL7106s,|cL7107S Electrical Specifications (Note 3)(Continued) PARAMETER TEST CONDITIONS TYP MAX UNIT DISPLAY DRIVER ICL7107 ONLY Segment Sinking Current V+=5v, Segment Voltage 3V Except Pins 19 and 20) 8 Pin 19 Only AAA Pin 20 Only NOTES: 3. Dissipation rating assumes device is mounted with all leads soldered to printed circuit board 4. Unless otherwise noted, specifications apply to both the ICL7106 and ICL7107 at Ta= 25C, fcLOCK = 48kHZ. ICL7106 is tested in the circuit of Figure 1. ICL7107 is tested in the circuit of Figure 2. 5. Back plane drive is in phase with segment drive for ' off segment, 180 degrees out of phase for on segment. Frequency is 20 times conversion rate. Average DC component is less than 50mv. 6. Not tested, guaranteed by design 7. Sample Tested Typical Applications and Test Circuits c1=0.1F c2=047F §惠}呈“盖呈B323B cL7106 s百5百6面88 N2 9 M? R3=100k E回囟西回回回回图图巴图图 R5=1M 999 FIGURE 1. ICL7106 TEST CIRCUIT AND TYPICAL APPLICATION WITH LCD DISPLAY COMPONENTS SELECTED FOR 200mV FULL SCALE §§号要呈言 左888 cL710 Eδ西6西888a DISPLAY E/999 FIGURE 2. ICL7107 TEST CIRCUIT AND TYPICAL APPLICATION WITH LED DISPLAY COMPONENTS SELECTED FOR 200mV FULL SCALE
4 Typical Applications and Test Circuits DISPLAY DRIVER ICL7107 ONLY Segment Sinking Current V+ = 5V, Segment Voltage = 3V (Except Pins 19 and 20) 5 8 - mA Pin 19 Only 10 16 - mA Pin 20 Only 4 7 - mA NOTES: 3. Dissipation rating assumes device is mounted with all leads soldered to printed circuit board. 4. Unless otherwise noted, specifications apply to both the ICL7106 and ICL7107 at TA = 25oC, fCLOCK = 48kHz. ICL7106 is tested in the circuit of Figure 1. ICL7107 is tested in the circuit of Figure 2. 5. Back plane drive is in phase with segment drive for ‘off’ segment, 180 degrees out of phase for ‘on’ segment. Frequency is 20 times conversion rate. Average DC component is less than 50mV. 6. Not tested, guaranteed by design. 7. Sample Tested. Electrical Specifications (Note 3) (Continued) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT FIGURE 1. ICL7106 TEST CIRCUIT AND TYPICAL APPLICATION WITH LCD DISPLAY COMPONENTS SELECTED FOR 200mV FULL SCALE FIGURE 2. ICL7107 TEST CIRCUIT AND TYPICAL APPLICATION WITH LED DISPLAY COMPONENTS SELECTED FOR 200mV FULL SCALE 13 1 2 3 4 5 6 7 8 9 10 11 12 14 15 16 17 18 19 20 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 V+ D1 C1 B1 A1 F1 G1 E1 D2 C2 B2 A2 F2 E2 D3 B3 F3 E3 AB4 POL OSC 1 OSC 2 OSC 3 TEST REF HI REF LO CREF+ CREFCOM IN HI IN LO A-Z BUFF INT V- G2 C3 A3 G3 BP DISPLAY DISPLAY C1 C2 C3 C4 R3 R1 R4 C5 + - IN R5 R2 9V ICL7106 C1 = 0.1µF C2 = 0.47µF C3 = 0.22µF C4 = 100pF C5 = 0.02µF R1 = 24kΩ R2 = 47kΩ R3 = 100kΩ R4 = 1kΩ R5 = 1MΩ + - 13 1 2 3 4 5 6 7 8 9 10 11 12 14 15 16 17 18 19 20 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 V+ D1 C1 B1 A1 F1 G1 E1 D2 C2 B2 A2 F2 E2 D3 B3 F3 E3 AB4 POL OSC 1 OSC 2 OSC 3 TEST REF HI REF LO CREF+ CREFCOM IN HI IN LO A-Z BUFF INT V- G2 C3 A3 G3 GND DISPLAY DISPLAY C1 C2 C3 C4 R3 R1 R4 C5 + - IN R5 R2 ICL7107 +5V -5V C1 = 0.1µF C2 = 0.47µF C3 = 0.22µF C4 = 100pF C5 = 0.02µF R1 = 24kΩ R2 = 47kΩ R3 = 100kΩ R4 = 1kΩ R5 = 1MΩ ICL7106, ICL7107, ICL7106S, ICL7107S
cL7106,cL7107,cL7106s,|cL7107S Design Information Summary Sheet OSCILLATOR FREQUENCY · DISPLAY COUNT fosc =0.45/RC COUNT=1000XV Cosc >50pF: Rosc > 50k fosc(Typ)=48kHz CONVERSION CYCLE · OSCILLATOR PERIOD tcyc =tCLOCK X 4000 Rc045 tcyc =tosc X 16,000 INTEGRATION CLOCK FREQUENCY when fosc =48kHz; tcYC =333ms COMMON MODE INPUT VOLTAGE c+1V)<VN<(+-0.5V) INTEGRATION PERIOD · AUTO-ZERO CAPACITOR tINT 1000 X(4/fosc 60/50Hz REJECTION CRITERION REFERENCE CAPACITOR tINT/60Hz Or tIN 0. 1uF CREF luF OPTIMUM INTEGRATION CURRENT v INT =4 Biased between Vi and V- FULL SCALE ANALOG INPUT VOLTAGE vcoM≡V+28V VINFS (TyP)=200mV or 2V Regulation lost when V+to∨<≡6.8V If VcoM is externally pulled down to(V+ to v-)/2, INTEGRATE RESISTOR he VcoM circuit will turn off R INT ICL7106 POWER SUPPLY: SINGLE 9V V+-V-=9V · INTEGRATE CAPACITOR Digital supply is generated internally (INT)(INT) VGND=V+-4.5V ICL7106 DISPLAY: LCD INTEGRATOR OUTPUT VOLTAGE SWING (tINT)(INT) ICL7107 POWER SUPPLY: DUAl V+=+5V to GND V-=-5V to GND VINT MAXIMUM SWING: Digital Logic and LED driver supply V+ to GND +05V)<VNT<0+-0.5v),VNT(Typ)=2V ICL7107 DISPLAY: LED Type: Non-Multiplexed Common Anode Typical Integrator Amplifier output Waveform(INT Pin 2③-微 ToTAL CONVERSION TIME=4000 x clocK =16,000 x tosc
5 Typical Integrator Amplifier Output Waveform (INT Pin) Design Information Summary Sheet • OSCILLATOR FREQUENCY fOSC = 0.45/RC COSC > 50pF; ROSC > 50kΩ fOSC (Typ) = 48kHz • OSCILLATOR PERIOD tOSC = RC/0.45 • INTEGRATION CLOCK FREQUENCY fCLOCK = fOSC/4 • INTEGRATION PERIOD tINT = 1000 x (4/fOSC) • 60/50Hz REJECTION CRITERION tINT/t60Hz or tlNT/t60Hz = Integer • OPTIMUM INTEGRATION CURRENT IINT = 4µA • FULL SCALE ANALOG INPUT VOLTAGE VlNFS (Typ) = 200mV or 2V • INTEGRATE RESISTOR • INTEGRATE CAPACITOR • INTEGRATOR OUTPUT VOLTAGE SWING • VINT MAXIMUM SWING: (V- + 0.5V) < VINT < (V+ - 0.5V), VINT (Typ) = 2V • DISPLAY COUNT • CONVERSION CYCLE tCYC = tCL0CK x 4000 tCYC = tOSC x 16,000 when fOSC = 48kHz; tCYC = 333ms • COMMON MODE INPUT VOLTAGE (V- + 1V) < VlN < (V+ - 0.5V) • AUTO-ZERO CAPACITOR 0.01µF < CAZ < 1µF • REFERENCE CAPACITOR 0.1µF < CREF < 1µF • VCOM Biased between Vi and V-. • VCOM ≅ V+ - 2.8V Regulation lost when V+ to V- < ≅6.8V If VCOM is externally pulled down to (V+ to V-)/2, the VCOM circuit will turn off. • ICL7106 POWER SUPPLY: SINGLE 9V V+ - V- = 9V Digital supply is generated internally VGND ≅ V+ - 4.5V • ICL7106 DISPLAY: LCD Type: Direct drive with digital logic supply amplitude. • ICL7107 POWER SUPPLY: DUAL ±5.0V V+ = +5V to GND V- = -5V to GND Digital Logic and LED driver supply V+ to GND • ICL7107 DISPLAY: LED Type: Non-Multiplexed Common Anode RINT VINFS I INT = ----------------- CINT t INT ( ) I INT ( ) VINT = -------------------------------- VINT t INT ( ) I INT ( ) CINT = -------------------------------- COUNT 1000 VIN VREF = × --------------- AUTO ZERO PHASE (COUNTS) 2999 - 1000 SIGNAL INTEGRATE PHASE FIXED 1000 COUNTS DE-INTEGRATE PHASE 0 - 1999 COUNTS TOTAL CONVERSION TIME = 4000 x tCLOCK = 16,000 x tOSC ICL7106, ICL7107, ICL7106S, ICL7107S