第一讲 CMOS工艺 游飞博导，副教授 电子科学与工程学院，feiyou@uestc.edu.cn
第一讲 CMOS工艺 游飞 博导，副教授 电子科学与工程学院, feiyou@uestc.edu.cn
1.Why CMOS? 作传作传作 A.功耗因素 NPN-BJT NMOS CMOS Vdd Vcc Vdd Rc Rd PMOS BJT NMOS 输出低 NMOS 8>0 Ig=0 电平 输出低 Id>0 电平 Id=0
1. Why CMOS? BJT NMOS Rc Vcc Rd Vdd I B >0 Ig=0 输出低 电平 Id>0 NMOS Vdd 输出低 电平 Id=0 PMOS A. 功耗因素 NPN-BJT NMOS CMOS
1.Why CMOS? 作作作作作 B.尺寸缩放能力 Source Gate Drain NPN-BJT NMOS VGs<VTH P+ N+ N+ n depletion region P substrate Approx.current equations VBE Approx.saturation current equations Ie=Ies ID= Hn Cox Ic OF IE 2 H[Vas -Vi]2 IB =(1-aF)IE Complete Ebers-Moll equations 尺寸缩放因子 VBE C ic Is -e VT 1 R 90 nm 65 nm 45 nm 32 nm 22nm 14nm 2003 2005 2007 2009 2011 2014 1 VBE 1 VBC iB=Is e vr -1 十 e vr 厥 分 1 -e vr SiGe VT SiGe
1. Why CMOS? B. 尺寸缩放能力 NPN-BJT Complete Ebers–Moll equations Approx. current equations NMOS Approx. saturation current equations 尺寸缩放因子
1.Why CMOS? C.集成度 Johnson figure of merit 。截止频率*击穿电压 104 High-Performance Ill-V GaN OSHEMT DARPA COSMOS InP HBT (OAZH5) 103 InP GaAs MESFET HEMT ASiGe 102 HBT 日0a Si MOSFET 10 1001011021031041051061071081091010 Number of Transistors
1. Why CMOS? C. 集成度 • Johnson figure of merit • 截止频率*击穿电压
1.Why CMOS? 传 D.Cost Productivity 28 nm 20nm 40nm 20m 20m 14 nm 16m 19m Node vs.Transistor no.per S 65 nm 11.2m 90 nm .nm -Nanometres 7.3m .Forecast Source Linley Group 130nm 180nm 4.4m Mid-range devices are highly 2.6m sensitive to cost 28nm provides the most transistors per dollar
1. Why CMOS? D. Cost & Productivity 180 nm 2.6m 130 nm 4.4m 90 nm 7.3m 65 nm 11.2m 40 nm 16m 28 nm 20m 20 nm 20m 14 nm 19m Node vs. Transistor no. per $