CHAPTER4Combinational Logic Design-Arithmetic Operation(Section4.6&4.9)
CHAPTER 4 Combinational Logic DesignArithmetic Operation (Section 4.6&4.9)
OverviewBinary Addition> Half Adder≥ Full Adder>Ripple CarryAdder(并行加法器)>CarryLookahead Adder(超前进位加法器）Decimal Addition (Section 4.6.6)Binary Comparators(Section 4.7
Overview ◼ Binary Addition ➢ Half Adder ➢ Full Adder ➢ Ripple Carry Adder(并行加法器) ➢ Carry Look ahead Adder(超前进位加法器) ◼ Decimal Addition (Section 4.6.6) ◼ Binary Comparators (Section 4.7
1-bit AdderPerforms the addition of two binary bitsFour possible operations:>0+0=0>0+1=1≥1+0=1> 1+1=10Circuit implementation requires 2 outputs; oneto indicate the sum and another to indicate thecarry
1-bit Adder ◼ Performs the addition of two binary bits. ◼ Four possible operations: ➢ 0+0=0 ➢ 0+1=1 ➢ 1+0=1 ➢ 1+1=10 ◼ Circuit implementation requires 2 outputs; one to indicate the sum and another to indicate the carry
HalfAdderPerforms 1-bit additionTruth TableAoBo|So|CiInputs: Ao, BoOutputs: So, C1Index indicates significance.O is for LSB and 1 is for thenext higher significant bitBoolean equations:> So = ABo+AoBo = Ao @ Bo> Ci = ABo
Half Adder ◼ Performs 1-bit addition. ◼ Inputs: A0 , B0 ◼ Outputs: S0 , C1 ◼ Index indicates significance, 0 is for LSB and 1 is for the next higher significant bit. ◼ Boolean equations: ➢ S0 = A0B0 ’+A0 ’B0 = A0 B0 ➢ C1 = A0B0 A0 B0 S0 C1 Truth Table
Half Adder (cont.)So = AoB+Ao'Bo = Ao@ BoC, = ABoBlock DiagramLogic DiagramBoAoAoSo1 bitBoChalf adderCiSoWER
Half Adder (cont.) ◼ S0 = A0B0 ’+A0 ’B0 = A0 B0 ◼ C1 = A0B0 1 bit half adder A0 B0 C1 S0 A0 B0 S0 C1 Block Diagram Logic Diagram