4.4 Timing HazardsBecause of circuit delays, the transientbehavior of a logic circuit may differ fromwhat is predicted by a steady-stateanalysis. In particular, a circuit's outputmay produce a short pulse, often called aglitch, at a time when steady-state analysispredicts that the output should not change.A hazard is said to exist when a circuit hasthe possibility of producing such a glitch
A hazard is said to exist when a circuit has the possibility of producing such a glitch. 4.4 Timing Hazards Return Next Because of circuit delays, the transient behavior of a logic circuit may differ from what is predicted by a steady-state analysis. In particular, a circuit’s output may produce a short pulse, often called a glitch, at a time when steady-state analysis predicts that the output should not change
4.4 Timing HazardsSimulation1.Static Hazardsx A static-1 hazard is a pair ofyinput combinations that: (a)Zdiffer in only one inputdvariable and (b) both give a 1zoutput; such that it ispossible for a momentary 0xzoutput to occur during atransition in the differingyzinput variable.xzFZFZA static-1yyzhazard
4.4 Timing Hazards 1. Static Hazards ▪ A static-1 hazard is a pair of input combinations that: (a) differ in only one input variable and (b) both give a 1 output; such that it is possible for a momentary 0 output to occur during a transition in the differing input variable. x y z z xz yz F z x y z xz yzF d t A static-1 hazard Return Back Next Simulation
4.4 Timing HazardsxAstatic-0 hazard is a pair ofinput combinations that: (a)ydiffer in only one input2variable and (b) both give a 0taoutput; such that it iszpossible for a momentary 1output to occur during ax+ztransition in the differinginput variable.x+zy+zxFzFzyAstatic-0y+zhazard
4.4 Timing Hazards ▪ A static-0 hazard is a pair of input combinations that: (a) differ in only one input variable and (b) both give a 0 output; such that it is possible for a momentary 1 output to occur during a transition in the differing input variable. z x y z x + z y + z F d t A static-0 hazard x y z z x + z y + z F Return Back Next
4.4 Timing Hazards2.Finding Static Hazards Using Maps- A Karnaugh map can be used to detect statichazards in a two-level sum-of-products orproduct-of-sums circuit.Aproperly designed two-level sum-of-products(AND-OR) circuit has no static-O hazards. Itmay have static-1 hazards A properly designed two-level product-of-sums(OR-AND) circuit has no static-1 hazards. Itmay have static-1 hazards
4.4 Timing Hazards 2. Finding Static Hazards Using Maps ▪ A Karnaugh map can be used to detect static hazards in a two-level sum-of-products or product-of-sums circuit. ▪ A properly designed two-level sum-of-products (AND-OR) circuit has no static-0 hazards. It may have static-1 hazards. ▪ A properly designed two-level product-of-sums (OR-AND) circuit has no static-1 hazards. It may have static-1 hazards. Return Back Next
4.4 Timing HazardsExamplesyzyzx0001 11 10x0001 11 10F=x·z+y·zF=x.z+y.z+xyWhen z from 1 goes to O, it is possiblefor the output to "glitch" momentarily to0 if yz from 1 goes to 0 before x.z from 0goes to 1
4.4 Timing Hazards Return Back Next • Examples F = x z + y z F = x z + y z + x y yz x 00 01 11 10 yz x 00 01 11 10 When z from 1 goes to 0, it is possible for the output to “glitch” momentarily to 0 if y.z from 1 goes to 0 before x.z from 0 goes to 1