高级计算机体系结构设计及其在数据中心和云计算的应用DRAM Refresh (2/2)BurstRefresh- Stop the world, refresh all memoryDistributed refresh-Spaceoutrefreshonerowatatime- Avoids blocking memory for a long timeSelf-refresh (low-power mode)-TellDRAMtorefreshitself-Turn off memory controller- Takes some time to exit self-refresh
高级计算机体系结构设计及其在数据中心和云计算的应 用 DRAM Refresh (2/2) • Burst Refresh – Stop the world, refresh all memory • Distributed refresh – Space out refresh one row at a time – Avoids blocking memory for a long time • Self-refresh (low-power mode) – Tell DRAM to refresh itself – Turn off memory controller – Takes some time to exit self-refresh
高级计算机体系结构设计及其在数据中心和云计算的应用DRAM OrganizationAll banks within theDRAMX8DRAMDRAMrank share all addressandcontrol pinsDRAMDRAMBankDRAMDRAMAll banks are independentbut can onlytalk to oneDRAMDRAMbank ata timeDIMMx8 means each DRAMDRAMDRAMoutputs8bits,need8DRAMDRAMchipsforDDRx(64-bit)DRAMDRAMWhy 9 chips per rank?X8DRAMDRAMDRAM64bitsdata,8bitsECCDRAMDRAMRankDual-rankx8(2Rx8)DIMM
高级计算机体系结构设计及其在数据中心和云计算的应 用 DIMM DRAM Organization DRAM DRAM DRAM DRAM DRAM DRAM DRAM DRAM DRAM x8 DRAM DRAM DRAM DRAM DRAM DRAM DRAM DRAM Rank Dual-rank x8 (2Rx8) DIMM x8 DRAM Bank All banks within the rank share all address and control pins x8 means each DRAM outputs 8 bits, need 8 chips for DDRx (64-bit) All banks are independent, but can only talk to one bank at a time Why 9 chips per rank? 64 bits data, 8 bits ECC DRAM DRAM