EDA技术讲义 CASE语句使用时容易发生的错误: SIGNAL value INTEGER RANGE OTO 15 SIGNAL outI: STD LOGIC CASE value s 缺少以WHEN引导的条件句 END CASE CASE value s WHEN0=>0utl<="I';- value2~15的值未包括进去 WHEN1=>outl<="0’; END CASE CASE value s WHEN0T010=0utl=1;--选择值中5~10的值有重叠 WHEN 5TO 15=>outI<=0 END CASE
EDA技术讲义 SIGNAL value : INTEGER RANGE 0 TO 15; SIGNAL out1 : STD_LOGIC ; ... CASE value IS -- 缺少以WHEN引导的条件句 END CASE； ... CASE value IS WHEN 0 => out1<= '1' ; -- value2～15的值未包括进去 WHEN 1 => out1<= '0' ; END CASE ... CASE value IS WHEN 0 TO 10 => out1<= '1';-- 选择值中5～10的值有重叠 WHEN 5 TO 15 => out1<= '0'; END CASE; CASE语句使用时容易发生的错误：
【例】(3-8译码器) library ieee use ieee std logic 1164. all entity decode38 is port(a, b, c, G1, G2, G2 B: in std logic y: out std logic vector(7 downto 0)); end entity decode38 architecture ex of decode38 is signal indata: std logic vector(2 downto 0); be egIn indatas=c&b& a process(indata, Gl, G2, G2 B) begin if(GI='land g2=0'and g2b=0")then 接下页
EDA技术讲义 【例】（3-8译码器） library ieee; use ieee.std_logic_1164.all; entity decode38 is port(a,b,c,G1,G2,G2B: in std_logic; y: out std_logic_vector(7 downto 0)); end entity decode38; architecture ex of decode38 is signal indata: std_logic_vector(2 downto 0); begin indata<= c & b & a; process(indata,G1,G2,G2B) begin if(G1 = '1'and G2 = '0' and G2B = '0') then 接下页
EDA技术讲义 case indata is 接上页 when 000v 911111110 when"00"→>y<="llll1 when010=>y<=11111011; when011=>y<=11110111; when100=>y<=11101111; when101=>y<=11011111; when110"=>y<=101111l1" when 111' y<="1111 when others=>y<=xXxXXXxx 9 end case, ese 11111111 end end process: end architecture ex
EDA技术讲义 case indata is when "000" => y <= "11111110"; when "001" => y <= "11111101"; when "010" => y <= "11111011"; when "011" => y <= "11110111"; when "100" => y <= "11101111"; when "101" => y <= "11011111"; when "110" => y <= "10111111"; when "111" => y <= "01111111"; when others => y <= "XXXXXXXX"; end case; else y <= "11111111"; end if; end process; end architecture ex; 接上页
EDA技术讲义 61.4LOOP语句 (1)单个LOOP语句,其语法格式如下: [工OOP标号:]LooP 顺序语句 END LOOPILOOP标号l 感感 用法示例如下 工2:1ooP a+1; ExL2wNa×10;-当a大于10时跳出循环際 END LOOP L2; (2) FOR LOOP语句,语法格式如下: [ooP标号:]FOR循环变量IN循环次数范围工ooP 顺序语句 END LOOP LOOP标号];
EDA技术讲义 6.1.4 LOOP语句 （1）单个LOOP语句，其语法格式如下： [ LOOP标号：] LOOP 顺序语句 END LOOP [ LOOP标号]; （2）FORLOOP语句，语法格式如下： [LOOP标号：] FOR 循环变量 IN 循环次数范围 LOOP 顺序语句 END LOOP [LOOP标号]； 用法示例如下： ... L2 : LOOP a := a+1; EXIT L2 WHEN a >10 ; -- 当a大于10时跳出循环 END LOOP L2;
EDA技术讲义 多 【例】 SIGNAL a, b, c: STD LOGIC vECToR (1 to 3)i FOR n IN 1 To 3 LOOP a(n)<= b(n) AND c(n)i END LOOP: 此段程序等效于顺序执行以下三个信号赋值操作: a(1)<=b(1)ANDc(1); a(2)<=b(2)ANDc(2); a(3)<=b(3)ANDc(3);
EDA技术讲义 【例】 SIGNAL a, b, c : STD_LOGIC_VECTOR (1 TO 3); ... FOR n IN 1 To 3 LOOP a(n) <= b(n) AND c(n); END LOOP; 此段程序等效于顺序执行以下三个信号赋值操作： a(1) <= b(1) AND c(1); a(2) <= b(2) AND c(2); a(3) <= b(3) AND c(3);