1394 Open Host Controller Interface Specification Release 1.1 January 6,2000 Copyright 1996-2000 by the Promoters of the 1394 Open HCI
1394 Open Host Controller Interface Specification Release 1.1 January 6, 2000 Copyright © 1996-2000 by the Promoters of the 1394 Open HCI
PREFACE 1394 Open Host Controller Interface Specification Release 1.1 Printed 1/10/00 PREFACE Notice THIS SPECIFICATION IS PROVIDED "AS IS"WITH NO WARRANTIES WHATSOEVER,INCLUDING ANY WARRANTY OF MERCHANTABILITY,NONINFRINGEMENT,FITNESS FOR ANY PARTICULAR PURPOSE,OR ANY WARRANTY OTHERWISE ARISING OUT OF ANY PROPOSAL,SPECIFICATION OR SAMPLE.Apple Computer,Inc.,Compaq Computer Corporation,Intel Corporation,Microsoft Corporation, National Semiconductor Corporation,Sun Microsystems,Inc.,and Texas Instruments,Inc.disclaim all liability, including liability for infringement of any proprietary rights,relating to use of information in this specification.No license,express or implied,by estoppel or otherwise,to any intellectual property rights is granted herein.Except that a license is hereby granted to copy and reproduce this specification for internal use only.*Third-party brands and names are the property of their respective owners. Copyright 1996-2000 All Rights Reserved.Apple Computer,Inc.,Compaq Computer Corporation,Intel Corporation,Microsoft Corporation,National Semiconductor Corporation,Sun Microsystems,Inc.,and Texas Instruments,Inc. Intellectual Property Implementation of this Specification is governed by the terms of the 1394 Open Host Controller Interface Patent License Agreement. This specification may contain and sometimes even require the use of intellectual property owned by others. Rights to such intellectual property are not conveyed except as provided by the 1394 Open HCI Promoters agree- ment and the 1394 Open HCI Adopters agreement. Information An on-line copy,updates,and notices regarding this specification will be maintained on the following web sites: http://developer.intel.com/technology/1394/specs.htm http://www.microsoft.com/hwdev/1394/#Specs Questions,comments,and issues concerning this document should be directed to the 1394 Open HCI reflector: 1394ohci-l@austin.ibm.com Copyright1996-2000 All rights reserved. Pageiii
Copyright © 1996-2000 All rights reserved. Page iii PREFACE 1394 Open Host Controller Interface Specification / Release 1.1 Printed 1/10/00 PREFACE Notice THIS SPECIFICATION IS PROVIDED "AS IS" WITH NO WARRANTIES WHATSOEVER, INCLUDING ANY WARRANTY OF MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR ANY PARTICULAR PURPOSE, OR ANY WARRANTY OTHERWISE ARISING OUT OF ANY PROPOSAL, SPECIFICATION OR SAMPLE. Apple Computer, Inc., Compaq Computer Corporation, Intel Corporation, Microsoft Corporation, National Semiconductor Corporation, Sun Microsystems, Inc., and Texas Instruments, Inc. disclaim all liability, including liability for infringement of any proprietary rights, relating to use of information in this specification. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. Except that a license is hereby granted to copy and reproduce this specification for internal use only. *Third-party brands and names are the property of their respective owners. Copyright © 1996-2000 All Rights Reserved. Apple Computer, Inc., Compaq Computer Corporation, Intel Corporation, Microsoft Corporation, National Semiconductor Corporation, Sun Microsystems, Inc., and Texas Instruments, Inc. Intellectual Property Implementation of this Specification is governed by the terms of the 1394 Open Host Controller Interface Patent License Agreement. This specification may contain and sometimes even require the use of intellectual property owned by others. Rights to such intellectual property are not conveyed except as provided by the 1394 Open HCI Promoters agreement and the 1394 Open HCI Adopters agreement. Information An on-line copy, updates, and notices regarding this specification will be maintained on the following web sites: http://developer.intel.com/technology/1394/specs.htm http://www.microsoft.com/hwdev/1394/#Specs Questions, comments, and issues concerning this document should be directed to the 1394 Open HCI reflector: 1394ohci-l@austin.ibm.com
PREFACE 1394 Open Host Controller Interface Specification Release 1.1 Printed 1/10/00 Promoters The Promoters of record on January 6,2000,the date of publication of the 1394 Open Host Controller Interface Specifi- cation,Release 1.1,are: Apple Computer,Inc. Compaq Computer Corporation Intel Corporation Microsoft Corporation National Semiconductor Corporation Sun Microsystems,Inc. Texas Instruments.Inc. Contributors The Open HCI 1.0 specification was developed using Apple Computer's Pele design as a starting point.The Pele contributors were Jim Baldwin,Kevin Christiansen,Nikhil Jayaram,Michael Johas Teener and Rahoul Puri.The original Editor of the 1394 Open HCI specification up through Draft 0.7,was Michael Johas Teener. This specification is a derivative of the 1394 Open Host Controller Interface specification Release 1.00.The 1394 Open HCI Release 1.00 key contributors were Eric W.Anderson,Richard Baker,Joe Bennett,Mike Eneboe,John Fuller,Jerry Hauck,Diana Klashman(Editor),Robert Macomber,Rahoul Puri,Michael Johas Teener,Peter Teng,Scott Smyers,Erik Staats,Lee Wilson,(Chair),and David Wooten. The following is a list of key contributors to the 1394 Open Host Controller Interface Release 1.1 specification. Lee Wilson,Chair Steve Bard,Co-Vice-Chair John Fuller,Co-Vice-Chair Neil Morrow,Editor Eric W.Anderson Richard Baker David Hunter Diana Klashman Robert Macomber Mike Musciano Peter Teng David Wooten Page iv Copyright 1996-2000 All rights reserved
Page iv Copyright © 1996-2000 All rights reserved. PREFACE 1394 Open Host Controller Interface Specification / Release 1.1 Printed 1/10/00 Promoters The Promoters of record on January 6, 2000, the date of publication of the 1394 Open Host Controller Interface Specification, Release 1.1, are: Apple Computer, Inc. Compaq Computer Corporation Intel Corporation Microsoft Corporation National Semiconductor Corporation Sun Microsystems, Inc. Texas Instruments, Inc. Contributors The Open HCI 1.0 specification was developed using Apple Computer’s Pele design as a starting point. The Pele contributors were Jim Baldwin, Kevin Christiansen, Nikhil Jayaram, Michael Johas Teener and Rahoul Puri. The original Editor of the 1394 Open HCI specification up through Draft 0.7, was Michael Johas Teener. This specification is a derivative of the 1394 Open Host Controller Interface specification Release 1.00. The 1394 Open HCI Release 1.00 key contributors were Eric W. Anderson, Richard Baker, Joe Bennett, Mike Eneboe, John Fuller, Jerry Hauck, Diana Klashman (Editor), Robert Macomber, Rahoul Puri, Michael Johas Teener, Peter Teng, Scott Smyers, Erik Staats, Lee Wilson, (Chair), and David Wooten. The following is a list of key contributors to the 1394 Open Host Controller Interface Release 1.1 specification. Lee Wilson, Chair Steve Bard, Co-Vice-Chair John Fuller, Co-Vice-Chair Neil Morrow, Editor Eric W. Anderson Richard Baker David Hunter Diana Klashman Robert Macomber Mike Musciano Peter Teng David Wooten
Table of Contents 1394 Open Host Controller Interface Specification/Release 1.1 Printed 1/10/00 Table of Contents PREFACE. .. Notice ...i Intellectual Property ...1 Information iii Promoters ..IV Contributors iv Table of Contents ...V List of Figures… ……xiii List ofTables .xVii 1.Introduction .1 1.1 Related documents..... .1 1.2 Overview... 1.2.1 Asynchronous functions. 1.2.2 Isochronous functions....... 1.2.3 Miscellaneous functions 2 1.3 Hardware description. .3 1.3.I Host bus interface..... .3 1.3.2DMA. 1.3.2.1 Asynchronous transmit DMA .4 1.3.2.2 Asynchronous receive DMA 5 1.3.2.3 Isochronous transmit DMA 1.3.2.4 Isochronous receive DMA -T 1.3.2.5 Self-ID receive DMA.......... .5 1.3.3 Global unique ID (GUID)interface... 1.3.4FIFOS. 5 6 1.3.4.1 Asynchronous transmit FIFOs 6 1.3.4.2 Isochronous transmit FIFO.... 1.3.4.3 Receive FIFOs....... 6 6 1.3.5Link… 6 1.4 Software interface overview.............. 8 1.4.I Registers. 8 1.4.2 DMA operation.. .8 1.4.3 Interrupts....... 8 1.5 1394 Open HCI Node Offset (Address)Map. .9 1.6 System Requirements............... .10 1.7Alignment .10 1.7.1 Data alignment........ .10 1.7.2 Memory structure and buffer alignment. ..10 2.Conventions-Notation and Terms............ .11 2.1 Notation… .11 2.1.1 Conformance glossary .11 2.1.2 Numeric Notation..... ,11 2.1.3 Bit Notation......... ,11 2.1.4 Register Notation......... .11 Copyright1996-2000 All rights reserved Pagev
Copyright © 1996-2000 All rights reserved. Page v Table of Contents 1394 Open Host Controller Interface Specification / Release 1.1 Printed 1/10/00 Table of Contents PREFACE ............................................................................................................................................................................ iii Notice .............................................................................................................................................................................. iii Intellectual Property ........................................................................................................................................................ iii Information ..................................................................................................................................................................... iii Promoters .................................................................................................................................................................iv Contributors .................................................................................................................................................................... iv Table of Contents .................................................................................................................................................................v List of Figures ................................................................................................................................................................... xiii List of Tables .....................................................................................................................................................................xvii 1. Introduction .......................................................................................................................................................................1 1.1 Related documents................................................................................................................................................1 1.2 Overview ..............................................................................................................................................................1 1.2.1 Asynchronous functions.............................................................................................................................1 1.2.2 Isochronous functions ................................................................................................................................1 1.2.3 Miscellaneous functions.............................................................................................................................2 1.3 Hardware description............................................................................................................................................3 1.3.1 Host bus interface.......................................................................................................................................3 1.3.2 DMA ..........................................................................................................................................................4 1.3.2.1 Asynchronous transmit DMA..........................................................................................................4 1.3.2.2 Asynchronous receive DMA ...........................................................................................................5 1.3.2.3 Isochronous transmit DMA .............................................................................................................5 1.3.2.4 Isochronous receive DMA ...............................................................................................................5 1.3.2.5 Self-ID receive DMA ......................................................................................................................5 1.3.3 Global unique ID (GUID) interface ...........................................................................................................5 1.3.4 FIFOs .........................................................................................................................................................6 1.3.4.1 Asynchronous transmit FIFOs.........................................................................................................6 1.3.4.2 Isochronous transmit FIFO..............................................................................................................6 1.3.4.3 Receive FIFOs .................................................................................................................................6 1.3.5 Link............................................................................................................................................................6 1.4 Software interface overview .................................................................................................................................8 1.4.1 Registers ....................................................................................................................................................8 1.4.2 DMA operation ..........................................................................................................................................8 1.4.3 Interrupts....................................................................................................................................................8 1.5 1394 Open HCI Node Offset (Address) Map........................................................................................................9 1.6 System Requirements .........................................................................................................................................10 1.7 Alignment ...........................................................................................................................................................10 1.7.1 Data alignment .........................................................................................................................................10 1.7.2 Memory structure and buffer alignment ...................................................................................................10 2. Conventions - Notation and Terms ...................................................................................................................................11 2.1 Notation ..............................................................................................................................................................11 2.1.1 Conformance glossary..............................................................................................................................11 2.1.2 Numeric Notation.....................................................................................................................................11 2.1.3 Bit Notation..............................................................................................................................................11 2.1.4 Register Notation .....................................................................................................................................11
Table of Contents 1394 Open Host Controller Interface Specification Release 1.1 Printed 1/10/00 2.1.4.1 Read/Write registers.......... .12 2.1.4.2 Set and Clear registers.. 12 2.1.4.3 Register Reset Values....... ..13 2.1.4.4 Reserved fields .13 2.1.4.5 Reserved registers 2.1.4.6 Register field notation 13 .13 2.2 Terms 14 3.Common DMA Controller Features........ 17 3.I Context Registers.... 3.1.1 ContextControl register........... 17 .17 3.1.1.1 ContextControl.run.......... 20 3.1.1.2 ContextControl.wake.... .20 3.1.1.3 ContextControl.active............ 21 3.1.1.4 ContextControl.dead. 21 3.1.2 CommandPtr register........ .22 3.1.2.1 Bad Z Value............. 23 3.2 List Management. .23 3.2.1 Software Behavior.... 23 3.2.1.1 Context Initialization..... 23 3.2.1.2 Appending to Running List... .23 3.2.1.3 Stopping a Context.. 23 3.2.2 Hardware Behavior .23 3.3 Asynchronous Receive............. 3.3.1 FIFO Implementation (informative)........ .25 25 3.3.1.1 Unrecoverable Error (informative) .26 3.3.2 Ack Codes for Write Requests... .26 3.3.3 Posted Writes.... 27 3.3.4 Retries.… .28 3.4 DMA Summary........ 28 4.Register addressing...... .29 4.1 DMA Context Number Assignments .30 4.2 Register Map.… .30 5.1394 Open HCI Registers ,35 5.1 Register Conventions........... .35 5.2 Version Register....... .35 5.3 GUID ROM register(optional). .36 5.4 ATRetries Register.......... .36 5.5 Autonomous CSR Resources..... 38 5.5.1 Bus Management CSR Registers......... 38 5.5.2 Config ROM header.................. 39 5.5.3 Bus identification register............. 40 5.5.4 Bus options register..... .…40 5.5.5 Global Unique ID... 42 5.5.6 Configuration ROM mapping register...... .42 5.6 Vendor ID register......... 44 5.7 HCControl registers (set and clear)........... 45 5.7.1 noByteSwapData...... ..47 5.7.2 programPhy Enable and aPhyEnhanceEnable. 48 Page vi Copyright1996-2000 All rights reserved
Page vi Copyright © 1996-2000 All rights reserved. Table of Contents 1394 Open Host Controller Interface Specification / Release 1.1 Printed 1/10/00 2.1.4.1 Read/Write registers ......................................................................................................................12 2.1.4.2 Set and Clear registers...................................................................................................................12 2.1.4.3 Register Reset Values ....................................................................................................................13 2.1.4.4 Reserved fields ..............................................................................................................................13 2.1.4.5 Reserved registers .........................................................................................................................13 2.1.4.6 Register field notation ...................................................................................................................13 2.2 Terms ..................................................................................................................................................................14 3. Common DMA Controller Features .................................................................................................................................17 3.1 Context Registers................................................................................................................................................17 3.1.1 ContextControl register............................................................................................................................17 3.1.1.1 ContextControl.run........................................................................................................................20 3.1.1.2 ContextControl.wake.....................................................................................................................20 3.1.1.3 ContextControl.active....................................................................................................................21 3.1.1.4 ContextControl.dead......................................................................................................................21 3.1.2 CommandPtr register ...............................................................................................................................22 3.1.2.1 Bad Z Value...................................................................................................................................23 3.2 List Management ................................................................................................................................................23 3.2.1 Software Behavior....................................................................................................................................23 3.2.1.1 Context Initialization.....................................................................................................................23 3.2.1.2 Appending to Running List ...........................................................................................................23 3.2.1.3 Stopping a Context ........................................................................................................................23 3.2.2 Hardware Behavior ..................................................................................................................................23 3.3 Asynchronous Receive........................................................................................................................................25 3.3.1 FIFO Implementation (informative).........................................................................................................25 3.3.1.1 Unrecoverable Error (informative) ................................................................................................26 3.3.2 Ack Codes for Write Requests .................................................................................................................26 3.3.3 Posted Writes ...........................................................................................................................................27 3.3.4 Retries......................................................................................................................................................28 3.4 DMA Summary ..................................................................................................................................................28 4. Register addressing ..........................................................................................................................................................29 4.1 DMA Context Number Assignments ..................................................................................................................30 4.2 Register Map ......................................................................................................................................................30 5. 1394 Open HCI Registers ................................................................................................................................................35 5.1 Register Conventions ..........................................................................................................................................35 5.2 Version Register..................................................................................................................................................35 5.3 GUID ROM register (optional) ...........................................................................................................................36 5.4 ATRetries Register..............................................................................................................................................36 5.5 Autonomous CSR Resources..............................................................................................................................38 5.5.1 Bus Management CSR Registers .............................................................................................................38 5.5.2 Config ROM header .................................................................................................................................39 5.5.3 Bus identification register ........................................................................................................................40 5.5.4 Bus options register..................................................................................................................................40 5.5.5 Global Unique ID.....................................................................................................................................42 5.5.6 Configuration ROM mapping register......................................................................................................42 5.6 Vendor ID register ..............................................................................................................................................44 5.7 HCControl registers (set and clear).....................................................................................................................45 5.7.1 noByteSwapData......................................................................................................................................47 5.7.2 programPhyEnable and aPhyEnhanceEnable...........................................................................................48