• Implementation of a simple allocator • Explicit Free List • Segregated Free List • Suggested reading

• Multilevel page tables • Different points of view • Pentium/Linux Memory System • Memory Mapping

• Virtual Space • Address translation • Accelerating translation – with a TLB – Multilevel page tables • Different points of view

• Cache mountain • Matrix multiplication • Suggested Reading

• General concepts • 3 ways to organize cache memory • Issues with writes • Write cache friendly codes • Cache mountain • Suggested Reading

• Random-Access Memory (RAM) • Nonvolatile Memory • Disk Storage • Locality • Memory hierarchy

• Four hardware components – Processor – Main memory – Peripherals (I/O devices) – Connections (buses) • Suggested reading

• Optimizing Blockers – Memory alias – Side effect in function call • Understanding Modern Processor – Super-scalar – Out-of –order execution • More Code Optimization techniques • Performance Tuning • Suggested reading

• Machine-Independent Optimization – Code motion – Memory optimization • Suggested reading

Data Hazards ◼ Instruction having register R as source follows shortly after instruction having register R as destination ◼ Common condition, don’t want to slow down pipeline Control Hazards ◼ Mispredict conditional branch ⚫ Our design predicts all branches as being taken ⚫ Naïve pipeline executes two extra instructions ◼ Getting return address for ret instruction ⚫ PIPE- executes three extra instructions Making Sure It Really Works ◼ What if multiple special cases happen simultaneously?