Altera产品系列主要性能 逻辑单元用户速度等级RAM 系列代表产品可用门数(F)J0(s)(位) APEX I EP2A90 4000k 892801140 1,523,712 APEX20KE20K1500E1500518408084442368 FLEX10K EPF10K10 250k 4992406424,576 FLEX8000 EPF8050 50k 40323603 FLEX6000 EPF6024A 24K MAX9000 EPM9560 12k 21212 MAX7000 EPM7256 25616010 MAX50EM6923k192641 Classic EP1810 4820
6 Altera 产品系列主要性能 逻辑单元 用户 速度等级 RAM （FF） I/O （ns） （位） APEX II EP2A90 4000k 89280 1140 1,523,712 APEX20K EP20K1500E 1500k 51840 808 4 442,368 FLEX10K EPF10K10 250k 4992 406 4 24,576 FLEX8000 EPF8050 50k 4032 360 3 FLEX6000 EPF6024A 24K 1960 218 5 MAX9000 EPM9560 12k 560 212 12 MAX7000 EPM7256 5k 256 160 10 MAX5000 EPM5192 3.75k 192 64 1 Classic EP1810 0.9k 48 48 20 系列 代表产品 可用门数
Altera公司千万门级的FPGA(SOC): Stratix Shipping High-Performance Architecture Since May 2002 TriMatrix Memory ALTERA. DSP Blocks Clock Management Circuitry (StratIx Terminator Technology Remote System Upgrades Nios Embedded Processor Differential Single-Ended 1/0 Standards External Memory Device Interfaces High-Speed Interfaces
7 Altera公司千万门级的FPGA (SOC): Stratix
Xilinx产品系列主要性能 CL B 速度等级驱动能力最大用RAM 系列代表产品可用门宏单元F(s)(mA)户0o(位) XC2000 XC2018L 1.0K-15K XC0039050K60K3209864141 XC300XC3195A67K484113200.9 8176 XC400X6kkb240621283 XC50XC5251488841936 8244 X60X046mk16818 85122K 24208 XC7200XC7272A20K XC7300XC7314438K 144234 XC9500XC9528864K 288288
8 Xilinx 产品系列主要性能 CLB/ 速度等级 驱动能力 最大用 RAM 宏单元 （ns） （mA） 户I/O （位） XC2000 XC2018L 1.0K~1.5K 100 172 10 4 74 XC3000 XC3090 5.0K~6.0K 320 928 6 4 144 XC3100 XC3195/A 6.5K~7.5K 484 1320 0.9 8 176 XC4000 XC4063EX 62K~130K 2304 5376 2 12 384 73728 XC5200 XC5215 14K~18K 484 1936 4 8 244 XC6200 XC6264 64K~100K 16384 16384 8 512 262K XC8100 XC8109 8.1K~9.4K 2688 1344 1 24 208 XC7200 XC7272A 2.0K 72 126 15 8 72 XC7300 XC73144 3.8K 144 234 7 24 156 XC9500 XC95288 6.4K 288 288 10 24 180 系列 代表产品 可用门 FF
Virtex-E Field-Programmable Gate Array Family Members System Logic CLB Logic Differential User BlockRAM Distributed Device Gates Gates Array Cells I/0 Pairs l0 BitsRAM Bits XCV50E71693207816x24172883176653624576 XCV10E1282368324020x302700831968192038400 XCV20E3063936350428×4252192841468175264 x04198432x486921736113029 XCV40E569952129.60040×6010800183404163840153600 XCV6ME9858821862448x72155212475122949122214 XCV0E16917831766496276482816039321639326 XM8E28241947281942159814964 XCV200254195251840080x120432034480465600614 XCV260032637568554192x13857132344804736481254 XCV320E074387876068104×156|730034804851968103836
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Virtex-II Field-Programmable Gate Array Family Members CLB (1 CLB=4 slices=Max 128 bits SelectRAM Blocks Maximum System A Distributed Multiplier 18-Kbit Max RAM Max lo Device Gates Row x Col. Slices RAM Kbits BlocksBlocks(Kbits) DCMs Pads XC2V40 40K 8x8 256 8 4 72 88 XC2V80 80K 16X8 512 16 144 4-48 120 XC2250250K24x161536 48 432 200 XC2V500500X|32×24|3072 96 576 8264 Xc210001M|40×325120 160 XC2V150015M48x407680 240 XC2V2002M|56x4810752336 420866 8420868 720 432 864 888 528 1.008 624 XC2V303M|64x561436 448 1728 12720 X2V40004M|80x7223040 720 120 120216012|912 XC2V60006M|96x88337921056 144 144 2592 121,104 XC2V8008M|112×104465921456 168 168302412|1108 XC2v100010M|128x120614401920 192345612|108
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