Parallel Program Organization in CUDASoftwareHardwareSPThreadSMThreadblockSMGPUGrid16
16 16 Parallel Program Organization in CUDA Thread Thread block Grid SP Software Hardware SM SM . GPU TPC SM SM SM TPC SM SM SM TPC SM SM SM
并行线程执行调用kernelfunction需要指定执行配置global._ void kernel(..);dim3DimGrid(3,2);Il6threadblocksdim3DimBlock(16,16);ll256threadsperblockkerne<<<DimGrid, DimBlock>>> (..);Threads和blocks具有IDsblockDim.xblockidx.xthreadldx:1D,2D,or3Dthreadldx.xblockldx:1D,or 2D由此决定相应处理数据idx = blockD im x*blockldx x+threadldxx5555kernelif (dx<N) a[idx)=a[idx)+1:17
17 17 并行线程执行 ◼ 调用kernel function 需要指定执行配置 ◼ Threads和blocks具有IDs ⚫ threadIdx: 1D, 2D, or 3D ⚫ blockIdx: 1D, or 2D ⚫ 由此决定相应处理数据 _global_ void kernel(.); dim3 DimGrid(3, 2); // 6 thread blocks dim3 DimBlock(16, 16); // 256 threads per block kernel<<< DimGrid, DimBlock>>> (.);
实例1:Element-WiseAdditionlICPUprogramIICUDA programllsumoftwovectorsaandbIlsumoftwovectorsaandbvoid add cpu(float*a,float *b,intN)globalvoidadd gpu(float*a,float*b,intN)for (int idx = 0; idx<N; idx++)Intidx=blockldx.x*blockDim.x+threadldx.x;if (idx<N)a[idx] += b[idx];a[idx] += b[idx];void main()void main()fun_add(a, b, N);dim3dimBlock (256);dim3dimGrid(ceil(N/256);人fun_add<<<dimGrid,dimBlock>>>(a,b,N);18
18 18 实例1: Element-Wise Addition //CPU program //sum of two vectors a and b void add_cpu(float *a, float *b, int N) { for (int idx = 0; idx<N; idx++) a[idx] += b[idx]; } void main() { . fun_add(a, b, N); } //CUDA program //sum of two vectors a and b _global_ void add_gpu(float *a, float *b, int N) { Int idx =blockIdx.x* blockDim.x+ threadIdx.x; if (idx < N) a[idx] += b[idx]; } void main() { . dim3 dimBlock (256); dim3 dimGrid( ceil( N / 256 ); fun_add<<<dimGrid, dimBlock>>>(a, b, N); }
提纲从GPGPU到CUDA并行程序组织并行执行模型CUDA基础存储器CUDA程序设计工具新一代FermiGPU19
19 19 提纲◼ 从GPGPU 到CUDA ◼ 并行程序组织 ◼ 并行执行模型 ◼ CUDA基础 ◼ 存储器 ◼ CUDA程序设计工具 ◼ 新一代Fermi GPU
CUDA Processing FlowMainCPUMemoryCopyprocessingdataInstructtheprocessing2CopytheresultMemoryforGPUExecute parallelGPUineach core(GeForce8800)3Processingflowon CUDA20
20 20 CUDA Processing Flow