maxim integrated. DS1302 Trickle-Charge Timekeeping Chip FEATURES PIN CONFIGURATIONS Reaca8eh8apmsaeontoyotn。 河 TOP VIEW 31 x 8 Battery-Backed General-Purpose RAM serial Uo for Minimum Pin Count 2.0V to 5.5V Full Operation Uses Less than 300nA at 2.0V DIP(300mils) RAM Data Veez LI1I Vcer 8npPoroptional8Bpnsoorsutbce X1四2g7四scLK Simple 3-Wire Interface GND可4 5CE TTL-Compatible(Vec=5V) SO(208 mils/150 mils) DS1202 Compatible Laboratori (U) ORDERING INFORMATION PART TEMP RANGE PIN-PACKAGE TOP MARK* DS1302+ 0Cto+70°0 PDIP (300 mils) DS1302 DS1302N+ .40PCt0+85°C 8 PDIP (300 mils) DS1302 DS1302S+ 0℃to+70℃ 8s0208mils】 DS1302S DS1302SN+ 40Ct0+85C S0(208mis) DS13025 0S13022Nt 513022 dustrial temperature grad A+anywhere on the top mar a lead-free device UL is a registered trade iters Laboratories,Inc For pricing,delivery,and ordering information,please contact Maxim Direct at 1-888-629-4642.or visit Maxim's website at www.maximintegrated.com. REV:120208
AVAILABLE Functional Diagrams Pin Configurations appear at end of data sheet. Functional Diagrams continued at end of data sheet. UCSP is a trademark of Maxim Integrated Products, Inc. For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim’s website at www.maximintegrated.com. DS1302 Trickle-Charge Timekeeping Chip REV: 120208 FEATURES Real-Time Clock Counts Seconds, Minutes, Hours, Date of the Month, Month, Day of the Week, and Year with Leap-Year Compensation Valid Up to 2100 31 x 8 Battery-Backed General-Purpose RAM Serial I/O for Minimum Pin Count 2.0V to 5.5V Full Operation Uses Less than 300nA at 2.0V Single-Byte or Multiple-Byte (Burst Mode) Data Transfer for Read or Write of Clock or RAM Data 8-Pin DIP or Optional 8-Pin SO for Surface Mount Simple 3-Wire Interface TTL-Compatible (VCC = 5V) Optional Industrial Temperature Range: -40°C to +85°C DS1202 Compatible Underwriters Laboratories (UL®) Recognized PIN CONFIGURATIONS ORDERING INFORMATION PART TEMP RANGE PIN-PACKAGE TOP MARK* DS1302+ 0°C to +70°C 8 PDIP (300 mils) DS1302 DS1302N+ -40°C to +85°C 8 PDIP (300 mils) DS1302 DS1302S+ 0°C to +70°C 8 SO (208 mils) DS1302S DS1302SN+ -40°C to +85°C 8 SO (208 mils) DS1302S DS1302Z+ 0°C to +70°C 8 SO (150 mils) DS1302Z DS1302ZN+ -40°C to +85°C 8 SO (150 mils) DS1302ZN +Denotes a lead-free/RoHS-compliant package. *An N anywhere on the top mark indicates an industrial temperature grade device. A + anywhere on the top mark indicates a lead-free device. UL is a registered trademark of Underwriters Laboratories, Inc. VCC1 SCLK I/O CE VCC2 X1 X2 GND 8 7 6 5 1 2 3 4 DIP (300 mils) DS1302 VCC2 X1 X2 GND VCC1 SCLK I/O CE 8 7 6 5 1 2 3 4 SO (208 mils/150 mils) DS1302 TOP VIEW
DS1302 Trickle-Charge Timekeeping Chip DETAILED DESCRIPTION The DS1302 trickle-charge timekeeping chip contains a real-time clock/calendar and 31 bytes of static RAM.It ep ame s mhe reae ours.d 12-hour format with an AM/PM indicator. g'coecto1o1eapyea17aeT8oek.peaiesRenere24i8ur8 transferred to and from the clock/RAM 1 byte at a time or in a burst of up to 31 bytes.The DS1302 is designed to operate on very low power and retain data and clock information on less than 1uw The DS1302 is the successor to the DS1202.In addition to the basic timekeeping functions of the DS1202,the Vcc1,and adbackup power supplies,programmable OPERATION shows the main elements of the serial timekeeper:shift register.control logic,oscllator,real-time clock. TYPICAL OPERATING CIRCUIT 0 CPU DS1302 GND 20f13
DS1302 Trickle-Charge Timekeeping Chip 2 of 13 DETAILED DESCRIPTION The DS1302 trickle-charge timekeeping chip contains a real-time clock/calendar and 31 bytes of static RAM. It communicates with a microprocessor via a simple serial interface. The real-time clock/calendar provides seconds, minutes, hours, day, date, month, and year information. The end of the month date is automatically adjusted for months with fewer than 31 days, including corrections for leap year. The clock operates in either the 24-hour or 12-hour format with an AM/PM indicator. Interfacing the DS1302 with a microprocessor is simplified by using synchronous serial communication. Only three wires are required to communicate with the clock/RAM: CE, I/O (data line), and SCLK (serial clock). Data can be transferred to and from the clock/RAM 1 byte at a time or in a burst of up to 31 bytes. The DS1302 is designed to operate on very low power and retain data and clock information on less than 1μW. The DS1302 is the successor to the DS1202. In addition to the basic timekeeping functions of the DS1202, the DS1302 has the additional features of dual power pins for primary and backup power supplies, programmable trickle charger for VCC1, and seven additional bytes of scratchpad memory. OPERATION Figure 1 shows the main elements of the serial timekeeper: shift register, control logic, oscillator, real-time clock, and RAM. TYPICAL OPERATING CIRCUIT CPU DS1302 VCC VCC2 SCLK CE GND X1 X2 VCC I/O VCC1
DS1302 Trickle-Charge Timekeeping Chip Figure 1.Block Diagram 2 DS1302 CE 31 X 8 RAM TYPICAL OPERATING CHARACTERISTICS (Vcc=3.3V.TA=+25C.unless otherwise noted.) ktys.Verst 350 30 30f13
DS1302 Trickle-Charge Timekeeping Chip 3 of 13 Figure 1. Block Diagram POWER CONTROL vCC1 vCC2 GND INPUT SHIFT REGISTERS I/O SCLK COMMAND AND CONTROL LOGIC REAL TIME CLOCK 31 X 8 RAM X2 X1 CE 1Hz CL CL DS1302 TYPICAL OPERATING CHARACTERISTICS (VCC = 3.3V, TA = +25°C, unless otherwise noted.) ICC2T vs. VCC2T 5 10 15 20 25 30 2.0 3.0 4.0 5.0 VCC2 (V) SUPPLY CURRENT (uA) ICC1T vs. VCC1T 100 150 200 250 300 350 400 2.0 3.0 4.0 5.0 VCC1 (V) SUPPLY CURRENT (nA)
DS1302 Trickle-Charge Timekeeping Chip PIN DESCRIPTION PIN NAME FUNCTION Primary Power-Supply Pin in Dual Supply Configuration.Vcc is connected to a el time and dateen strhn DS1302 2 X1 DS1302 can also be d .In this 3 X2 configuration,the X1 pin is connected to the external oscillator signal and the X2 pin is floated. 4 GND Ground Input.CE signal must be asserted high during a read or a write.This pin has an CE internal 40k(typ)pulldown resistor to ground.Note:Previous data sheet revisions referred to CE as RST.The functionality of the pin has not changed. 6 is the bidir nd SCLK Input.SCLK is used to synchronize data movement on the serial interface.This pin has an internal 40k(typ)pulldown resistor to ground. weoaarepeatannsgePcanmeBate2gcaeeateahaYenmaneow ergy source is connected to this pin.to ensure against reverse 40f13
DS1302 Trickle-Charge Timekeeping Chip 4 of 13 PIN DESCRIPTION PIN NAME FUNCTION 1 VCC2 Primary Power-Supply Pin in Dual Supply Configuration. VCC1 is connected to a backup source to maintain the time and date in the absence of primary power. The DS1302 operates from the larger of VCC1 or VCC2. When VCC2 is greater than VCC1 + 0.2V, VCC2 powers the DS1302. When VCC2 is less than VCC1, VCC1 powers the DS1302. 2 X1 3 X2 Connections for Standard 32.768kHz Quartz Crystal. The internal oscillator is designed for operation with a crystal having a specified load capacitance of 6pF. For more information on crystal selection and crystal layout considerations, refer to Application Note 58: Crystal Considerations for Dallas Real-Time Clocks. The DS1302 can also be driven by an external 32.768kHz oscillator. In this configuration, the X1 pin is connected to the external oscillator signal and the X2 pin is floated. 4 GND Ground 5 CE Input. CE signal must be asserted high during a read or a write. This pin has an internal 40kΩ (typ) pulldown resistor to ground. Note: Previous data sheet revisions referred to CE as RST. The functionality of the pin has not changed. 6 I/O Input/Push-Pull Output. The I/O pin is the bidirectional data pin for the 3-wire interface. This pin has an internal 40kΩ (typ) pulldown resistor to ground. 7 SCLK Input. SCLK is used to synchronize data movement on the serial interface. This pin has an internal 40kΩ (typ) pulldown resistor to ground. 8 VCC1 Low-Power Operation in Single Supply and Battery-Operated Systems and LowPower Battery Backup. In systems using the trickle charger, the rechargeable energy source is connected to this pin. UL recognized to ensure against reverse charging current when used with a lithium battery. Go to www.maximic.com/TechSupport/QA/ntrl.htm
DS1302 Trickle-Charge Timekeeping Chip OSCILLATOR CIRCUIT The DS1302 uses an external 32.768kHz crystal.The oscillator circuit does not require any external resistors or usually less than one second. CLOCK ACCURACY TeapeaaCoaheooksdeoenPangheeceapaeiQgtbetalaheacgiiCvacthemealchAbee error will be added by crystal frequency drift caused by temperature shifts.Exteral circuit noise coupled into the for detailed information. r to App Table 1.Crystal Specifications* PARAMETER SYMBOL MIN TYP MAX UNITS Nominal Frequency fo 32.768 kHz Series Resistance ESR .45 Load Capacitance 6 PF Figure 2.Typical PC Board Layout for Crystal LOCAL GROUND PLANE (LAYER 2) CRYSTAL D COMMAND BYTE and byte.A command byte initiates each data transfer.The MSB(bit 7)must be a 1.9ffis0.wmesloheDs1302hml6edsabledBt6speeiescockWcalendardatafiogc0orRAMdataflogc1 Figure 3.Address/Command Byte 7 0 AAA阳 50f13
DS1302 Trickle-Charge Timekeeping Chip 5 of 13 OSCILLATOR CIRCUIT The DS1302 uses an external 32.768kHz crystal. The oscillator circuit does not require any external resistors or capacitors to operate. Table 1 specifies several crystal parameters for the external crystal. Figure 1 shows a functional schematic of the oscillator circuit. If using a crystal with the specified characteristics, the startup time is usually less than one second. CLOCK ACCURACY The accuracy of the clock is dependent upon the accuracy of the crystal and the accuracy of the match between the capacitive load of the oscillator circuit and the capacitive load for which the crystal was trimmed. Additional error will be added by crystal frequency drift caused by temperature shifts. External circuit noise coupled into the oscillator circuit may result in the clock running fast. Figure 2 shows a typical PC board layout for isolating the crystal and oscillator from noise. Refer to Application Note 58: Crystal Considerations for Dallas Real-Time Clocks for detailed information. Table 1. Crystal Specifications* PARAMETER SYMBOL MIN TYP MAX UNITS Nominal Frequency fO 32.768 kHz Series Resistance ESR 45 kΩ Load Capacitance CL 6 pF *The crystal, traces, and crystal input pins should be isolated from RF generating signals. Refer to Application Note 58: Crystal Considerations for Dallas Real-Time Clocks for additional specifications. Figure 2. Typical PC Board Layout for Crystal LOCAL GROUND PLANE (LAYER 2) CRYSTAL X1 X2 GND NOTE: AVOID ROUTING SIGNALS IN THE CROSSHATCHED AREA (UPPER LEFTHAND QUADRANT) OF THE PACKAGE UNLESS THERE IS A GROUND PLANE BETWEEN THE SIGNAL LINE AND THE PACKAGE. COMMAND BYTE Figure 3 shows the command byte. A command byte initiates each data transfer. The MSB (bit 7) must be a logic 1. If it is 0, writes to the DS1302 will be disabled. Bit 6 specifies clock/calendar data if logic 0 or RAM data if logic 1. Bits 1 to 5 specify the designated registers to be input or output, and the LSB (bit 0) specifies a write operation (input) if logic 0 or read operation (output) if logic 1. The command byte is always input starting with the LSB (bit 0). Figure 3. Address/Command Byte 1 RAM C K A4 A3 A2 A1 A0 RD W R 76543210