13RESYSTEMBOARDLEVELINTEGRATIONEORMOBILEPHONES-20-40-P&aect-60GSM900agtGSM1800-80-100-120Ref0.6-1.6->3MHzSens1.6MHz3MHzFigure2.4Receiversensitivity&blockingrequirements.In the extended GSM900 band,the specification is relaxed by around 12 dBtoavoid even more severeduplexerfiltering requirements.In the1800MHzbands,thespecifications are comparable to the E-GSM requirements scaled by the frequency.2.3.4Receiverblockingvs.sensitivity (Fig.2.4)By themselves, neither the receiver blocking nor the receiver sensitivity requirementsis intrinsically difficult to meet: it is achieving both requirements simultaneouslywithin a low-power, low-cost handset that is the design challenge. The sensitivityrequirements translate intosystemnoisefiguresof about10.2dB at900MHzand12.2 dB at 1800MHz for a typical GSM equaliser realisation. It is good practice todesign for a nominal performance at least 4dB better than these figures to give ade-quateproductionmargin.Themostchallengingblockingrequirement isthe3MHzblockingfigurewhichisalmost80dBuponthewantedsignal(74dBforGSM1800)Translated into voltages on chip, it is necessary to receive a signal at a level ofaround2μV,withoutdistortion, in thepresenceofa blocking signal ofaround 20mV.Thisdegree of linearity must be maintained by the receiver front end, ie.the LNA, andparticularly the mixer,beforethe blocking signal amplitude can be reduced in thefirstIFfilter.2.4ARCHITECTURECHOICESTherequirements highlighted in theprevious section are reflected into various architec-tural choices in thedesign ofthe BRIGHT devices.On the transmitter, thekey choice
RF SYSTEM BOARD LEVEL INTEGRATION FOR MOBILE PHONES 13 In the extended GSM900 band, the specification is relaxed by around 12 dB to avoid even more severe duplexer filtering requirements. In the 1800MHz bands, the specifications are comparable to the E-GSM requirements scaled by the frequency. 2.3.4 Receiver blocking vs. sensitivity (Fig. 2.4) By themselves, neither the receiver blocking nor the receiver sensitivity requirements is intrinsically difficult to meet: it is achieving both requirements simultaneously within a low-power, low-cost handset that is the design challenge. The sensitivity requirements translate into system noise figures of about 10.2 dB at 900 MHz and 12.2 dB at 1800MHz for a typical GSM equaliser realisation. It is good practice to design for a nominal performance at least 4 dB better than these figures to give adequate production margin. The most challenging blocking requirement is the 3 MHz blocking figure which is almost 80 dB up on the wanted signal (74 dB for GSM 1800). Translated into voltages on chip, it is necessary to receive a signal at a level of around 2 µV, without distortion, in the presence of a blocking signal of around 20 mV. This degree of linearity must be maintained by the receiver front end, i.e. the LNA, and particularly the mixer, before the blocking signal amplitude can be reduced in the first IF filter. 2.4 ARCHITECTURE CHOICES The requirements highlighted in the previous section are reflected into various architectural choices in the design of the BRIGHT devices. On the transmitter, the key choice
14CIRCUITSANDSYSTEMSFORWIRELESSCOMMUNICATIONS5172MHzOFFSETPLLBLOCK27QMHzLPFPhaseDetecto270MHz902MHzPAFigure2.5 Offsetphase locked looptransmitter.is theuse of an offset phase-locked loop.This approach has substantial benefits forsystemslikeGSMwhichemployconstantenvelopemodulation.As a result of the strict phase and modulation accuracy requirements ofGSM, it isonly reallyfeasibleto perform transmit carriermodulation in the digital domain.Thismust then be converted into an analogue signal and translated to the required transmitfrequency.In a conventional approach, the frequency translation is performed in oneormoreup-conversion stages.One oftheproblems oftrying todothis operation in asingle stage, when the mixer's local oscillatorruns at the same frequency as the trans-mittedsignal,isthatofcross-couplingbetweenthemodulatedhigh-leveltransmitterpower output and theunmodulated low-levelVCO.A solution tothis problem istousemultiple conversions,but each conversion stage introduces spurious conversion prod-ucts which must be filtered out. A better approach is the one illustrated in Fig.2.5. Inthis scheme,therequired signal modulation is impressed upon a VCO bymeans ofaphaselocked loop.Themodulated VCOoutput ismixed down to a suitable interme-diate frequency and compared with the signal from thedigital modulator,which hasbeen up-converted to the sameIF.The loop comparison frequencyis notcritical and ischosentoprovideasuitablefrequencyplan.Channelisationis supportedbysteppingthelocal oscillatorasnormalThebandwidthoftheloop hasa significant effectupon overall transmitterperfor-mance.Thelow-passfilter intheoffset PLLmustbe chosentooptimisethefollowingparameters:Minimum loop settlingtime (following frequency steps)Geodphasetracking(togiveminimumphaseerror)Manimumin-bandspuri(tomeetmodulationspectrumrequirements)Suppression ofwide-band modulator noise (tomeettransmit noisein receivebandrequirements)Typically,aloopbandwidthofaround 1 MHz isfoundtobeoptimum.Using abasicoffsetPLLdesign of theform shown has clearbenefits:The VCO is inherently a constant-envelope device, hence no spurious amplitudemodulation occurs in the signal driving the PA,and therefore we find no spuriousPMgenerated inthePAthroughAM-PM conversioneffects
14 CIRCUITS AND SYSTEMS FOR WIRELESS COMMUNICATIONS is the use of an offset phase-locked loop. This approach has substantial benefits for systems like GSM which employ constant envelope modulation. As a result of the strict phase and modulation accuracy requirements of GSM, it is only really feasible to perform transmit carrier modulation in the digital domain. This must then be converted into an analogue signal and translated to the required transmit frequency. In a conventional approach, the frequency translation is performed in one or more up-conversion stages. One of the problems of trying to do this operation in a single stage, when the mixer’s local oscillator runs at the same frequency as the transmitted signal, is that of cross-coupling between the modulated high-level transmitter power output and the unmodulated low-level VCO. A solution to this problem is to use multiple conversions, but each conversion stage introduces spurious conversion products which must be filtered out. A better approach is the one illustrated in Fig. 2.5. In this scheme, the required signal modulation is impressed upon a VCO by means of a phase locked loop. The modulated VCO output is mixed down to a suitable intermediate frequency and compared with the signal from the digital modulator, which has been up-converted to the same IF. The loop comparison frequency is not critical and is chosen to provide a suitable frequency plan. Channelisation is supported by stepping the local oscillator as normal. The bandwidth of the loop has a significant effect upon overall transmitter performance. The low-pass filter in the offset PLL must be chosen to optimise the following parameters: Minimum loop settling time (following frequency steps). Good phase tracking (to give minimum phase error). Minimum in-band spurii (to meet modulation spectrum requirements). Suppression of wide-band modulator noise (to meet transmit noise in receive band requirements). Typically, a loop bandwidth of around 1 MHz is found to be optimum. Using a basic offset PLL design of the form shown has clear benefits: The VCO is inherently a constant-envelope device, hence no spurious amplitude modulation occurs in the signal driving the PA, and therefore we find no spurious PM generated in the PA through AM–PM conversion effects
RESYSTEMBOARDLEVELINTEGRATIONFORMOBILEPHONES15-The noise floor of the VCO is sufficiently low so that it can meet the receiver-bandnoise-floorrequirementswithoutfurtherfiltering.Theduplexfiltercanbereplacedbyasimplelow-passharmonicfilterandatransmit/receiveswitch,withconsider-ablecostandspacesavings.- Removing the duplex filter reduces the loss in the transmit path by around 1 dBThis implies up to25%longer talk time for the handset.Removing theduplexfilter removes amajorcause of rippleinthetransmitbandThis allows thehandset manufacturer tomakeuse of themargin in thetransmitlevelspecificationstooperatethehandsetclosertotheminimum level,thusgivingfurtherbatterylifeimprovements.Inthereceiver,thearchitectural choiceismainly about thenumber of conversionstagesandthefrequencyplan.Atwo-IFapproachhasbeenchosenforBRIGHTwith a 225 MHz SAW filter defining the first IF. The use of a relatively high firstIF means that image frequencies and other spurious responses from the first mixercausenoparticularproblems.ThemajorityofreceivergainoccursatthesecondIFof 45 MHz,and it is here also that the AGC is applied. This approach minimisespower consumption in the receiver. In our reference baseband solution (the AnalogDevices GSM baseband chip sets),the channel filtering occurs digitally as part of theanalogue-to-digital converter-anotherexampleof system design choices.Thus,at 45 MHz, only a relatively wide-band LC filter is required to provide protectionagainstblocking of subsequentstages.The architecture of thecomplete900MHzBRIGHT device is shown in Fig, 2.6. The main UHF local oscillator runs at 1150 to1185MHz and drives both the receiver first mixer and the transmitter offset mixer.Byensuring that the receiver first IF and the transmitter offset loop comparison frequencyare spacedby the Tx/Rx duplex offset (i.e.45 MHz)the pulling range ofthe firstlocaloscillatorisminimisedtotheoperatingbandwidthof35MHz.The loop comparison frequency is chosento be a multiple of 45 MHz (in this case6×45MHz=270MHz),togivea simple scheme forgenerating all other requiredfrequenciesby on-chipdivisionas shownIn termsof integration,all thetransmitand receive siliconfunctionalityis integratedontoa singledevice,butthePLL synthesiserfunctions forthetwomain oscillatorsareon a separate device.This choice was based on an assessment ofthe risk factors in-volved versus the benefits.There is virtually no difference in printed circuit board areawhether or not the synthesisers are integrated, yet there is a significant risk of noise inthe digital PLL synthesiser leaking into the analogue parts of the chip.Furthermore,thePLLsynthesisersareestablishedpartsThe front-end low noise amplifier is also not fully integrated within the BRIGHTdevice. Initial studies identified that it would be very difficult to achieve the necessarynoise figure and blocking performancefrom an integrated amplifier.Instead it wasdecided to integrate thebias function for the LNAand to use an external transistoras the amplifying device.The final die for theBRIGHT 900 MHz part is shown inFig.2.7.Somekeyprocess andpackagingparameters aresummarised inTab.2.1.When the first BRIGHT devices were designed, the main market interest was inGSM900. However, support of other single-band standards, DCS 1800 and PCS 1900,was alsoof interestand was afactorinthe choiceofarchitecture.Asa result,a high
RF SYSTEM BOARD LEVEL INTEGRATION FOR MOBILE PHONES 15 The noise floor of the VCO is sufficiently low so that it can meet the receiver-band noise-floor requirements without further filtering. The duplex filter can be replaced by a simple low-pass harmonic filter and a transmit/receive switch, with considerable cost and space savings. Removing the duplex filter reduces the loss in the transmit path by around 1 dB. This implies up to 25% longer talk time for the handset. Removing the duplex filter removes a major cause of ripple in the transmit band. This allows the handset manufacturer to make use of the margin in the transmit level specifications to operate the handset closer to the minimum level, thus giving further battery life improvements. In the receiver, the architectural choice is mainly about the number of conversion stages and the frequency plan. A two-IF approach has been chosen for BRIGHT, with a 225 MHz SAW filter defining the first IF. The use of a relatively high first IF means that image frequencies and other spurious responses from the first mixer cause no particular problems. The majority of receiver gain occurs at the second IF of 45 MHz, and it is here also that the AGC is applied. This approach minimises power consumption in the receiver. In our reference baseband solution (the Analog Devices GSM baseband chip sets), the channel filtering occurs digitally as part of the analogue–to–digital converter—another example of system design choices. Thus, at 45 MHz, only a relatively wide-band LC filter is required to provide protection against blocking of subsequent stages. The architecture of the complete 900 MHz BRIGHT device is shown in Fig. 2.6. The main UHF local oscillator runs at 1150 to 1185 MHz and drives both the receiver first mixer and the transmitter offset mixer. By ensuring that the receiver first IF and the transmitter offset loop comparison frequency are spaced by the Tx/Rx duplex offset (i.e. 45 MHz) the pulling range of the first local oscillator is minimised to the operating bandwidth of 35 MHz. The loop comparison frequency is chosen to be a multiple of 45 MHz (in this case to give a simple scheme for generating all other required frequencies by on-chip division as shown. In terms of integration, all the transmit and receive silicon functionality is integrated onto a single device, but the PLL synthesiser functions for the two main oscillators are on a separate device. This choice was based on an assessment of the risk factors involved versus the benefits. There is virtually no difference in printed circuit board area whether or not the synthesisers are integrated, yet there is a significant risk of noise in the digital PLL synthesiser leaking into the analogue parts of the chip. Furthermore, the PLL synthesisers are established parts. The front-end low noise amplifier is also not fully integrated within the BRIGHT device. Initial studies identified that it would be very difficult to achieve the necessary noise figure and blocking performance from an integrated amplifier. Instead it was decided to integrate the bias function for the LNA, and to use an external transistor as the amplifying device. The final die for the BRIGHT 900 MHz part is shown in Fig. 2.7. Some key process and packaging parameters are summarised in Tab. 2.1. When the first BRIGHT devices were designed, the main market interest was in GSM900. However, support of other single-band standards, DCS 1800 and PCS 1900, was also of interest and was a factor in the choice of architecture. As a result, a high
16CIRCUITS AND SYSTEMSFOR WIRELESS COMMUNICATIONSB.8BRiocHD155017TIPAN880~915 MH2Figure2.6BRIGHTarchitecture.Figure2.7BRIGHTchipdiefrequency variant BRIGHT-HF was developed with improved high frequency mixerperformance. Only towards the end of 1997 did it become apparent that dual-bandwould becomea major marketrequirement, and withthat came the further develop-
16 CIRCUITS AND SYSTEMS FOR WIRELESS COMMUNICATIONS frequency variant BRIGHT-HF was developed with improved high frequency mixer performance. Only towards the end of 1997 did it become apparent that dual-band would become a major market requirement, and with that came the further develop-
RFSYSTEMBOARDLEVELINTEGRATIONFORMOBILEPHONES17Table2.1BRIGHTprocessparameters.ParameterValueProcess Technology0.6μmBiCMOSFt15GHz1502rbb2.7VSupplyvoltageLQFP-48Packagement of the BRIGHT2 device. The BRIGHT architecture is well suited to dual-bandoperation,with only small adaptations.On thereceive side,the onlychange istheinclusion of a second mixer to support the second band: the first IF and subsequentcircuitryissharedbetweenbothbands.Onthetransmitside,theonlychangeistheinclusion of a different divide ratiofor operation at 1800 MHz,giving an offset loopcomparisonfrequencyof135MHz.ForminimumVCOrange,thedifferencebetweentransmitandreceiveIFsshouldegualtheTx/Rxduplexoffset.Inthiscase,forthe1800MHzoperation,wehavea90MHzIFseparation,comparedtoa75MHzdu-plex offset-thus giving around 20% excess pulling requirement over the theoreticalminimum.All otherareas of the architecture are essentially unchanged.Formarket reasons,however,a digital AGC is included in BRIGHT2,compared to the analogue AGCscheme used in the original BRIGHT.It is found that the digital AGC gives betterperformancethan theanalogueAGC, because the on-chipDAC can bebetter matchedtothecharacteristics oftheAGCamplifier.2.5RESULTS2.5.1TransmitterphaseerrorFig.2.9plots themeasured peakphase error as a functionofchannel number in theGSM band. The RMS phase error is very consistent at around 3°peaking up to justunder4° in one place.The truly remarkablefactor is the independence of the phaseerrorwith transmitpower level.This istestimony tothe real benefits oftheoffsetphase locked loop approach,where some ofthe sources of phase error,which causemajor problems with other architectures, are completely removed by design.Similarresults have also been reported to us for single-bandGSM900 and DCS1800 phones inproduction, based on the single-band BRIGHT variants. The peak phase error is alsowell within the specificationof 20°Comparableresults areobtained at 1800MHz(seeFig.2.10)
RF SYSTEM BOARD LEVEL INTEGRATION FOR MOBILE PHONES 17 ment of the BRIGHT2 device. The BRIGHT architecture is well suited to dual-band operation, with only small adaptations. On the receive side, the only change is the inclusion of a second mixer to support the second band: the first IF and subsequent circuitry is shared between both bands. On the transmit side, the only change is the inclusion of a different divide ratio for operation at 1800 MHz, giving an offset loop comparison frequency of 135 MHz. For minimum VCO range, the difference between transmit and receive IFs should equal the Tx/Rx duplex offset. In this case, for the 1800MHz operation, we have a 90 MHz IF separation, compared to a 75 MHz duplex offset—thus giving around 20% excess pulling requirement over the theoretical minimum. All other areas of the architecture are essentially unchanged. For market reasons, however, a digital AGC is included in BRIGHT2, compared to the analogue AGC scheme used in the original BRIGHT. It is found that the digital AGC gives better performance than the analogue AGC, because the on-chip DAC can be better matched to the characteristics of the AGC amplifier. 2.5 RESULTS 2.5.1 Transmitter phase error Fig. 2.9 plots the measured peak phase error as a function of channel number in the GSM band. The RMS phase error is very consistent at around 3°, peaking up to just under 4° in one place. The truly remarkable factor is the independence of the phase error with transmit power level. This is testimony to the real benefits of the offset phase locked loop approach, where some of the sources of phase error, which cause major problems with other architectures, are completely removed by design. Similar results have also been reported to us for single-band GSM900 and DCS 1800 phones in production, based on the single-band BRIGHT variants. The peak phase error is also well within the specification of 20°. Comparable results are obtained at 1800MHz (see Fig. 2.10)