7.2 Latches and Flip-Flops> Latch: a seguential device thatwatches all of its inputscontinuously and changes itsoutputs at any time,iretgengere stgueleairaecianal-that normally samples its inputsand changes its outputs only attimes determined by a clockingsignal.NextReturn
Return Next Ø Latch: a sequential device that watches all of its inputs continuously and changes its outputs at any time, independent of a clocking signal. 7.2 Latches and Flip-Flops Ø Flip-flop: a sequential device that normally samples its inputs and changes its outputs only at times determined by a clocking signal
7.2 Latches and Flip-Flops 7.2.1 S-R LatchNext state2.plepgicdiagramResetS ROn+1Qn+1RQQn00Qn001Primary011stateQ0*0*1 1SMetastableSetReturnBackNext
§ 7.2.1 S-R Latch Return Back Next 7.2 Latches and Flip-Flops R Q S Q Qn Qn 0 1 1 0 0* 0* 0 0 0 1 1 0 1 1 S R Qn+1 Qn+1 1. Logic diagram 2. Function table Reset Set Next state Primary state Metastable
7.2 Latches and Flip-Flops3.Functional behaviorS.R.QQS4. Characteristic equationRQQReturnBackNext
Return Back Next 7.2 Latches and Flip-Flops 3. Functional behavior S R Q Q S R Q Q 4. Characteristic equation
7.2 Latches and Flip-Flops5. Timing diagramS.R.Q.pLH(SQ)pHL(RQ)> Propagation delay: tpLH(SQ), tpHL(RQ)> Minimum pulse width: tpw(min)ReturnBackNext
Return Back Next 7.2 Latches and Flip-Flops 5. Timing diagram Ø Propagation delay: tpLH(SQ), tpHL(RQ) S R Q tpLH(SQ) tpHL(RQ) tpw(min) Ø Minimum pulse width: tpw(min)
7.2 Latches and Flip-Flops 7.2.2 S-R LatchsRQn+1Qn+1Qs001*1*0011001101R1QnQnReturnBackNext
Return Back Next 7.2 Latches and Flip-Flops § 7.2.2 S-R Latch S Q R Q 1* 1* 1 0 0 1 Qn Qn 0 0 0 1 1 0 1 1 S R Qn+1 Qn+1