高级计算机体系结构设计及其在数据中心和云计算的应用P6 Data Structures(1/2)RegfileMapTableRvaluevalue+HeadRetireTailDispatchV1V2TT1T2opROBDispatchRSKFU
高级计算机体系结构设计及其在数据中心和云计算的应用 P6 Data Structures (1/2) value V1 V2 T+ op T T1 T2 == Map Table CDB.T CDB.V Regfile == R value ROB Head Retire Tail Dispatch FU == == == == RS Dispatch T == == == ==
高级计算机体系结构设计及其在数据中心和云计算的应用P6 Data Structures (2/2)ROBCDBMapTableVS1cThtRVX#Reg|T+Insnfo1ldf x(rl),fl2f1mulffo,fi,f23f2stf f2,z(r1)4r1addi.rl,4,rl5ldfx(r1),fl6mulffo,f1,f27stff2.z(r1)ReservationStations#T1V1FUTV2T2busylop1ALUno2LDno3STno4FP1no5FP2no
高级计算机体系结构设计及其在数据中心和云计算的应用 P6 Data Structures (2/2) ROB ht # Insn R V S X C 1 ldf X(r1),f1 2 mulf f0,f1,f2 3 stf f2,Z(r1) 4 addi r1,4,r1 5 ldf X(r1),f1 6 mulf f0,f1,f2 Map Table Reg T+ f0 f1 f2 r1 CDB T V 6 mulf f0,f1,f2 7 stf f2,Z(r1) Reservation Stations # FU busy op T T1 T2 V1 V2 1 ALU no 2 LD no 3 ST no 4 FP1 no 5 FP2 no
高级计算机体系结构设计及其在数据中心和云计算的应用P6 Pipeline New pipeline structure: E, D, S, X, C, R- D (dispatch).Structuralhazard(ROB/RS)?stall·AllocateROB/RS·SetRStagtoROB#·SetMapTableentrytoROB#andclear“ready-in-ROB"bit·ReadreadyregistersintoRS(fromeitherROBorRegfile) x (execute)FreeRSentry-NoneedtowaitforW,becausetagisfromROBinsteadofRS
高级计算机体系结构设计及其在数据中心和云计算的应用 P6 Pipeline • New pipeline structure: F, D, S, X, C, R – D (dispatch) • Structural hazard (ROB/RS) ? stall • Allocate ROB/RS • Set RS tag to ROB# • Set Map Table entry to ROB# and clear “ready Set Map Table entry to ROB# and clear “ready-in-ROB” bit ROB” bit • Read ready registers into RS (from either ROB or Regfile) – X (execute) • Free RS entry – No need to wait for W, because tag is from ROB instead of RS
高级计算机体系结构设计及其在数据中心和云计算的应用P6Pipeline: C (complete)-Structuralhazard (CDB)?wait-Writevalue intoROBentryforRStag- If Map Table has same entry, set“ready-in-ROB"bit (+)R(retire)-Insn.atROBheadnotcomplete?stall-Handleanyexceptions.Somegobeforeinstruction(branchmispredict,pagefault)-why?. Some go after instruction (e.g., trap)-why?- ROB head value→ Regfile-FreeROBentry
高级计算机体系结构设计及其在数据中心和云计算的应用 P6 Pipeline • C (complete) – Structural hazard (CDB)? wait – Write value into ROB entry for RS tag – If Map Table has same entry, set “ready-in-ROB” bit (+) • R (retire) – Insn. at ROB head not complete ? stall – Handle any exceptions • Some go before instruction (branch mispredict, page fault) – why? • Some go after instruction (e.g., trap) – why? – ROB head value Regfile – Free ROB entry
高级计算机体系结构设计及其在数据中心和云计算的应用P6 Dispatch (D) (1/2)RegfileMapTableRT+valuevalueHeadRetireaaTail7DispatchV1V2opT T1 T2ROBDispatchRSTFURS/ROBfull?stallAllocate RS/ROB entries, assign ROB# to RS output tagMap Table entry set to ROB#, clear“"ready-in-ROB
高级计算机体系结构设计及其在数据中心和云计算的应用 P6 Dispatch (D) (1/2) value V1 V2 T+ op T T1 T2 == Map Table CDB.T CDB.V Regfile == R value ROB Head Retire Tail Dispatch • RS/ROB full ? stall • Allocate RS/ROB entries, assign ROB# to RS output tag • Map Table entry set to ROB#, clear “ready-in-ROB” FU == == == == RS Dispatch T == == == ==