MICROCHIP AN695 Interfacing Pressure Sensors to Microchip's Analog Peripherals This application note will concentrate on the signal con- Author: Bonnie Baker Microchip Technology Inc. ditioning path of the piezoresistive sensing element from sensor to microcontroller.It will show how the electrical output of this sensor can be gained,filtered INTRODUCTION and digitized in order to ready it for the microcontroller's calibration routines.This theoretical discussion will be Pressure measurement devices can be classified into followed with a specific pressure sensing design that is two groups:those where pressure is the only source of specifically designed to measure barometric pressure. power and those that require electrical excitation.The mechanical style devices that are only excited by pres- PIEZORESISTIVE PRESSURE sure,such as bellows,diaphragms,bourdons,tubes or SENSORS manometers,are usually suitable for purely mechani- cal systems.With these devices a change in pressure The piezoresistive is a solid state,monolithic sensor will initiate a mechanical reaction,such as a change in that is fabricated using silicon processing.Piezo means the position of mechanical arm or the level of liquid in a pressure,resistance means opposition to a DC current tube. flow.Since piezoresistive pressure sensors are fabri- Electrically excited pressure sensors are most syner- cated on a wafer,300 to 500 sensors can be produced gistic with the microcontroller environment.These style per wafer.Since these wafers generate a large number of sensors can be piezoresistive,Linear Variable Differ- of sensors they are available on the market at a ential Transformers (LVDT),or capacitive sensors. reduced cost as compared to mechanical sensors. Most typically,the piezoresistive sensor is used when measuring pressure. Voltage or Voltage or 个Current 不 Current Excitation Excitation Rs1 Rs2 VOUT- VOUT- 3 Rs4 Rs3 oVOUT+ Rs4 Rs3 oVOUT+ (a.)single element bridge (b.)two element bridge Dielectric Voltage or Contact Contact Current Excitation Si-P Rs2 Silicon VoUT- Substrate Si-N Rs3 VOUT+ Diaphragm (c.)four element or full bridge (d.)single side of a sandwiched piezoelectric pressure sensor Figure 1:The resistive wheatstone bridge configuration can have one variable element(a.),two elements that vary with excitation(b.)or four elements(c.).The piezoresistive pressure sensing element is usually a four element bridge and is constructed in silicon(d.). 2000 Microchip Technology Inc. Preliminary DS00695A-page 1
2000 Microchip Technology Inc. Preliminary DS00695A-page 1 INTRODUCTION Pressure measurement devices can be classified into two groups: those where pressure is the only source of power and those that require electrical excitation. The mechanical style devices that are only excited by pressure, such as bellows, diaphragms, bourdons, tubes or manometers, are usually suitable for purely mechanical systems. With these devices a change in pressure will initiate a mechanical reaction, such as a change in the position of mechanical arm or the level of liquid in a tube. Electrically excited pressure sensors are most synergistic with the microcontroller environment. These style of sensors can be piezoresistive, Linear Variable Differential Transformers (LVDT), or capacitive sensors. Most typically, the piezoresistive sensor is used when measuring pressure. This application note will concentrate on the signal conditioning path of the piezoresistive sensing element from sensor to microcontroller. It will show how the electrical output of this sensor can be gained, filtered and digitized in order to ready it for the microcontroller’s calibration routines. This theoretical discussion will be followed with a specific pressure sensing design that is specifically designed to measure barometric pressure. PIEZORESISTIVE PRESSURE SENSORS The piezoresistive is a solid state, monolithic sensor that is fabricated using silicon processing. Piezo means pressure, resistance means opposition to a DC current flow. Since piezoresistive pressure sensors are fabricated on a wafer, 300 to 500 sensors can be produced per wafer. Since these wafers generate a large number of sensors they are available on the market at a reduced cost as compared to mechanical sensors. Figure 1: The resistive wheatstone bridge configuration can have one variable element (a.), two elements that vary with excitation (b.) or four elements (c.). The piezoresistive pressure sensing element is usually a four element bridge and is constructed in silicon (d.). Author: Bonnie Baker Microchip Technology Inc. RS1 RS1 RS1 RS2 RS2 RS2 RS4 RS4 RS3 RS4 RS3 RS3 Voltage or Current Excitation Voltage or Current Excitation Voltage or Current Excitation VOUT+ VOUTVOUT+ VOUTVOUT+ VOUT- (a.) single element bridge (b.) two element bridge (c.) four element or full bridge (d.) single side of a sandwiched piezoelectric pressure sensor Silicon Substrate Contact Dielectric Contact Si-P Si-N Diaphragm AN695 Interfacing Pressure Sensors to Microchip’s Analog Peripherals
AN695 With this sensor,the resistors are arranged in a full ELECTRONICS SIGNAL PATH wheatstone bridge configuration,which has improved sensitivity as compared to a single element or two ele- There are several ways of capturing the small differen- ment sensors (see Figure 1.d).When a positive differ- tial output signal of the sensor and transforming it into ential pressure is applied to the four element bridge, a usable digital code.One approach that can be taken two of the elements respond by compressing and the is shown in the block diagram in Figure 2.a.With this other two change to a tension state.When a negative approach,the small differential output of the bridge is differential pressure is applied to the sensor,the dia- gained and converted from differential to single ended phragm is strained in the opposite direction and the with an instrumentation amplifier(IA).The signal may resistors that were compressed go into a tension state, or may not travel through a multiplexer.The signal then while the resistors that were in a tension state change passes through a low pass filter.The low pass filter into a compression state.Piezoresistive pressure sen- eliminates out-of-band noise and unwanted frequen- sors may or may not have an internal pressure refer- cies in the system before the A/D conversion is per- ence.If they do,a pressure reference cavity is formed.This is followed by a stand-alone A/D converter generally fabricated by sealing two wafers together. which transforms the analog signal into a usable digital The top side of this fabricated sensor is the resistive code.The microcontroller takes the converter code, material and the bottom is the diaphragm. further calibrates and translates if need be for display The high side of the piezoresistive bridges shown in purposes.In this signal path only one analog filter is Figure 1 can have a voltage excitation or current exci- required and it is positioned at the output of the multi- tation applied.Although the magnitude of excitation plexer. (whether it is voltage or current)effects the dynamic The second signal path shown in Figure 2.b also has range of the output of the sensor,the maximum differ- an instrumentation amplifier(IA)in the signal path.Fol- ence between VoUT+and VouT-generally ranges from lowing the instrumentation amplifier stage the signal is 10s of millivolts to several hundred millivolts.The elec- filtered in the analog domain and then digitized with an tronics that follow the sensor are used to change the on-chip microcontroller's A/D converter.When this type differential output signal to single ended as well as gain of signal path is used,every signal going into the mul- and filter it in preparation for digitization. tiplexer will require its own analog filter.Additionally, the accuracy and speed of the converter in the micro- controller is less than a stand-alone A/D converter.This may or may not be an issue in a particular application. (a.) MUX FILTER SAR Micro- A/D Controller REF FILTER MUX A/D VREF LOw MUX Pass COMP> Filter uC VREF Figure 2: Three block diagrams for the piezoresistive pressure sensor signal conditioning path are shown in this Figure.The top two block diagrams,a.and b.,are discussed in detail in this application note.The bottom block diagram(c.)is discussed in detail in AN717(Microchip Technology Inc.). DS00695A-page 2 Preliminary 2000 Microchip Technology Inc
AN695 DS00695A-page 2 Preliminary 2000 Microchip Technology Inc. With this sensor, the resistors are arranged in a full wheatstone bridge configuration, which has improved sensitivity as compared to a single element or two element sensors (see Figure 1.d). When a positive differential pressure is applied to the four element bridge, two of the elements respond by compressing and the other two change to a tension state. When a negative differential pressure is applied to the sensor, the diaphragm is strained in the opposite direction and the resistors that were compressed go into a tension state, while the resistors that were in a tension state change into a compression state. Piezoresistive pressure sensors may or may not have an internal pressure reference. If they do, a pressure reference cavity is generally fabricated by sealing two wafers together. The top side of this fabricated sensor is the resistive material and the bottom is the diaphragm. The high side of the piezoresistive bridges shown in Figure 1 can have a voltage excitation or current excitation applied. Although the magnitude of excitation (whether it is voltage or current) effects the dynamic range of the output of the sensor, the maximum difference between VOUT+ and VOUT- generally ranges from 10s of millivolts to several hundred millivolts. The electronics that follow the sensor are used to change the differential output signal to single ended as well as gain and filter it in preparation for digitization. ELECTRONICS SIGNAL PATH There are several ways of capturing the small differential output signal of the sensor and transforming it into a usable digital code. One approach that can be taken is shown in the block diagram in Figure 2.a. With this approach, the small differential output of the bridge is gained and converted from differential to single ended with an instrumentation amplifier (IA). The signal may or may not travel through a multiplexer. The signal then passes through a low pass filter. The low pass filter eliminates out-of-band noise and unwanted frequencies in the system before the A/D conversion is performed. This is followed by a stand-alone A/D converter which transforms the analog signal into a usable digital code. The microcontroller takes the converter code, further calibrates and translates if need be for display purposes. In this signal path only one analog filter is required and it is positioned at the output of the multiplexer. The second signal path shown in Figure 2.b also has an instrumentation amplifier (IA) in the signal path. Following the instrumentation amplifier stage the signal is filtered in the analog domain and then digitized with an on-chip microcontroller’s A/D converter. When this type of signal path is used, every signal going into the multiplexer will require its own analog filter. Additionally, the accuracy and speed of the converter in the microcontroller is less than a stand-alone A/D converter. This may or may not be an issue in a particular application. Figure 2: Three block diagrams for the piezoresistive pressure sensor signal conditioning path are shown in this Figure. The top two block diagrams, a. and b., are discussed in detail in this application note. The bottom block diagram (c.) is discussed in detail in AN717 (Microchip Technology Inc.). (a.) (c.) (b.) MUX Low Pass Filter COMP µC VREF A/D µC VREF MUX IA FILTER IA REF MUX FILTER A/D SAR MicroController
AN695 INSTRUMENTATION AMPLIFIER ational amplifiers,thereby significantly reducing source OPTIONS AND DESIGN impedance mismatch problems at DC.The transfer function of this circuit is equal to: With this application,the two low voltage signals from the bridge need to be subtracted in order to produce a single ended output signal.The results of this subtrac- tion also need to be gained so that it matches the input range of the A/D converter.The implementation of the subtraction and gain functions are done so that the sensor signal is not contaminated with additional It should be noted from this transfer function that the errors.The instrumentation amplifier circuits shown in input signals are gained along with the common-mode Figure 3 and Figure 4 achieve all of these goals.Both voltage of the two signals.The common-mode voltage of these configurations take two opposing input signals, can be rejected when R1=R4 and R2=R3.Given this subtract them and apply gain.The subtraction process change the transfer function becomes: inherently rejects common-mode voltages.Combined with these functions the signal is level shifted,making R1 2R1) it synergistic with the signal supply environment. 6ur=(V4-V1+瓦2+可 VREF The Two Op Amp Instrumentation Amplifier A solution to the circuit problem discussed above is The common-mode rejection error that is caused by shown in Figure 3.The circuit in Figure 3 uses two resistor mismatch is equal to: operational amplifiers and five resistors to solve this R2 gain and subtraction problem. 1* Dual amplifiers are usually used in this discrete design CMR =100 (of mismatch error) because of their good matching of bandwidth and over temperature performance.This instrumentation ampli- fier design uses the high impedance inputs of the oper- RG W R2 VpD R4 VREF O- R1 A1 R3 MCP602 A2 VIN-O MCP602 VIN+O Where R1=30k2 and R2=10k Figure 3:The two op amp instrumentation amplifier takes the difference of two input signals,gains that difference, while rejecting any voltage that is common to both of the input signals. 2000 Microchip Technology Inc. Preliminary DS00695A-page 3
2000 Microchip Technology Inc. Preliminary DS00695A-page 3 AN695 INSTRUMENTATION AMPLIFIER OPTIONS AND DESIGN With this application, the two low voltage signals from the bridge need to be subtracted in order to produce a single ended output signal. The results of this subtraction also need to be gained so that it matches the input range of the A/D converter. The implementation of the subtraction and gain functions are done so that the sensor signal is not contaminated with additional errors. The instrumentation amplifier circuits shown in Figure 3 and Figure 4 achieve all of these goals. Both of these configurations take two opposing input signals, subtract them and apply gain. The subtraction process inherently rejects common-mode voltages. Combined with these functions the signal is level shifted, making it synergistic with the signal supply environment. The Two Op Amp Instrumentation Amplifier A solution to the circuit problem discussed above is shown in Figure 3. The circuit in Figure 3 uses two operational amplifiers and five resistors to solve this gain and subtraction problem. Dual amplifiers are usually used in this discrete design because of their good matching of bandwidth and over temperature performance. This instrumentation amplifier design uses the high impedance inputs of the operational amplifiers, thereby significantly reducing source impedance mismatch problems at DC. The transfer function of this circuit is equal to: It should be noted from this transfer function that the input signals are gained along with the common-mode voltage of the two signals. The common-mode voltage can be rejected when R1 = R4 and R2 = R3. Given this change the transfer function becomes: The common-mode rejection error that is caused by resistor mismatch is equal to: Figure 3: The two op amp instrumentation amplifier takes the difference of two input signals, gains that difference, while rejecting any voltage that is common to both of the input signals. VOUT VIN+ VIN- ( ) – R4 R3 ------ 1 1 2 -- R2 R1 ------ R3 R4 ------ + + = + R2 R3 + RG -------------------- VCM + R4 R3 ------ R3 R4 ------ R2 R1 – ------ VREF + VOUT VIN+ VIN- ( ) – 1 R1 R2 + ------ 2R1 RG ---------- VREF = + + CMR 100* 1 R2 R1 + ------ ( ) % of mismatch error ---------------------------------------------------------- = + - + - A2 MCP602 A1 MCP602 VOUT 1 R1 R2 + ------ 2R1 RG ---------- VIN+ VIN- ( ) – VREF = 4 60 + kΩ RG ------------------------ VIN+ VIN- – ) VREF ( + = + + R4 VREF VINVIN+ R1 RG R2 R3 VDD Where R1 = 30kΩ and R2 = 10kΩ
AN695 The ac common mode rejection for this configuration is The second factor that limits the common-mode input poor.This is due to the fact that the common mode sig- range of this circuit comes from the input swing restric- nal at VIN.is inverted once with A1 and then it travels tions of the amplifiers themselves. through A2 causing a second propagation delay.The common mode signal at VIN+only travels through one If this circuit is in a single supply environment,it will typ- operational amplifier(A2).Additionally,the two opera- ically require a reference that is centered at the com- mon-mode voltage of the input signals.In Figure 4, tional amplifiers have different closed loop gains,and consequently different closed loop bandwidths. VREF serves that function.This voltage can be imple- mented discretely with a precision reference chip as In terms of common-mode input range,there are two shown in Figure 4.a or with two equal resistors in series factors that limit the range of this instrumentation ampli- between the power supply as shown in Figure 4.b. fier.The first factor involves the operation of A1 as it Another added benefit to matching R2/R=Ra/R4 is responds to the VIN-and VIN input signals and the volt- that the gain of the circuit can be changed with one age reference,VREF The signal at the non-inverting resistor,RG. input to A1 and A2 gained by the output of A1 by: This instrumentation amplifier circuit has high imped- VOUT-A1 VIN- (RGR2+RR2+RRG) ance inputs and programmable gain capability.The (R1R2) features that could be improved in this circuit solution is to have the common-mode rejection independent of VIN+RG gain and better over frequency.These performance characteristics can only be obtained by an instrumen- tation amplifier configuration that has three operational amplifiers R1=RIAlI R1B VpD Vop个 个 VREF M- RiA R2 RG R1B VoD R1 VREF R2 OR ViN- MCP602> ◆ MCP602> 0- VoUT VIN+ (a) (b) Figure 4:The reference voltage for a two op amp instrumentation amplifier in a single supply environment can be implemented with a stand-alone voltage reference(a)or a resistor divider across a voltage reference or the supply voltage(b). DS00695A-page 4 Preliminary @2000 Microchip Technology Inc
AN695 DS00695A-page 4 Preliminary 2000 Microchip Technology Inc. The ac common mode rejection for this configuration is poor. This is due to the fact that the common mode signal at VIN- is inverted once with A1 and then it travels through A2 causing a second propagation delay. The common mode signal at VIN+ only travels through one operational amplifier (A2). Additionally, the two operational amplifiers have different closed loop gains, and consequently different closed loop bandwidths. In terms of common-mode input range, there are two factors that limit the range of this instrumentation amplifier. The first factor involves the operation of A1 as it responds to the VIN- and VIN+ input signals and the voltage reference, VREF. The signal at the non-inverting input to A1 and A2 gained by the output of A1 by: The second factor that limits the common-mode input range of this circuit comes from the input swing restrictions of the amplifiers themselves. If this circuit is in a single supply environment, it will typically require a reference that is centered at the common-mode voltage of the input signals. In Figure 4, VREF serves that function. This voltage can be implemented discretely with a precision reference chip as shown in Figure 4.a or with two equal resistors in series between the power supply as shown in Figure 4.b. Another added benefit to matching R2/R1 = R3/R4 is that the gain of the circuit can be changed with one resistor, RG. This instrumentation amplifier circuit has high impedance inputs and programmable gain capability. The features that could be improved in this circuit solution is to have the common-mode rejection independent of gain and better over frequency. These performance characteristics can only be obtained by an instrumentation amplifier configuration that has three operational amplifiers. Figure 4: The reference voltage for a two op amp instrumentation amplifier in a single supply environment can be implemented with a stand-alone voltage reference (a) or a resistor divider across a voltage reference or the supply voltage (b). VOUT A– 1 VINRGR2 R1R2 R1RG ( ) + + (R1R2 ) ---------------------------------------------------------------- = –VIN+ R2 RG ------- VREF R2 R1 ------ – OR R2 + - + - MCP602 Precision Voltage MCP602 Reference (a) (b) R1 = R1A || R1B R1A R1B R2 RG VDD VINVIN+ R1 VOUT VDD VREF VREF VDD
AN695 The Three Op Amp Instrumentation Amplifier all gains as long as the signals stay within A1 and A2 An example of a more versatile instrumentation ampli- input and output head room limitations.If the common fier configuration is shown in Figure 5. mode errors of the input amplifiers track they will be cancelled by the output stage. With this circuit configuration.two of the three amplifi- ers (A1 and A2)gain the two input signals.The third If the assumption that R/R2 equals Rg/R4 is not cor- amplifier,A3,is used to subtract the two gained input rect,there could be a noticeable common mode volt- signals,thereby providing a single ended output.The age error.The calculated common-mode rejection transfer function of this circuit is equal to: (CMR)error that is attributed to resistor mismatches in this circuit is equal to: R1+R2 Vour=V:(1+R后)H,+R)i R2 1+ R1+R2 CMR =100 (of mismatch error) for R =Ra and R2 R4 If RE2=RF1,R=R3,and R2=R4,this formula can be simplified to equal: 2RF An example of the impact of this error is demonstrated VoUT (VIN-ViN.1+G VREF with a 12-bit,5V system,where the gain of the circuit is 100V/V,the common-mode voltage ranges 0 to 5V and Quad amplifiers are typically used in the three op-amp the matching error can be as large as +1%.Using the instrumentation amplifier discrete designs because of formula above,the contributed error of this type of com- the matching qualities of amplifiers with the same sili- mon-mode excursion is equal to 1mV.This voltage is con.In contrast to the two op-amp instrumentation slightly less than 1LSB. amplifier,the input signal paths(at VIN+and VIN-)are In a single supply environment,the voltage reference completely balanced.This is achieved by sending VIN+ should be equal to the center of the input signals.This and VIN-signals through the same number of amplifiers voltage is represented in the circuit in Figure 5 as VREF to the output and using a common gain resistor,RG. The purpose and effects of this reference voltage is to Since this input stage is balanced,common mode cur- simply shift the output signal into the linear region of the rents will not flow through RG.The common-mode amplifier. rejection of this circuit is primarily dependent on the resistor matching around A3.When R1=R2=R3=R4, common mode signals will be gained by a factor of one regardless of gain of the front end of the circuit.Conse- quently,large common mode signals can be handled at VIN- A1 MCP604 R2 w RF1 R1 W A3 RG MCP604 R3 + VoUT A2 MCP604 R4 VIN+o VREF Where RF1=RF2 and R1=R2=R3=R4 2RE)(ViN-ViN)+VAEF our=（1+ Figure 5: This is a three op amp implementation of an instrumentation amplifier. 2000 Microchip Technology Inc. Preliminary DS00695A-page 5
2000 Microchip Technology Inc. Preliminary DS00695A-page 5 AN695 The Three Op Amp Instrumentation Amplifier An example of a more versatile instrumentation amplifier configuration is shown in Figure 5. With this circuit configuration, two of the three amplifiers (A1 and A2) gain the two input signals. The third amplifier, A3, is used to subtract the two gained input signals, thereby providing a single ended output. The transfer function of this circuit is equal to: If RF2 = RF1, R1 = R3, and R2 = R4, this formula can be simplified to equal: Quad amplifiers are typically used in the three op-amp instrumentation amplifier discrete designs because of the matching qualities of amplifiers with the same silicon. In contrast to the two op-amp instrumentation amplifier, the input signal paths (at VIN+ and VIN-) are completely balanced. This is achieved by sending VIN+ and VIN- signals through the same number of amplifiers to the output and using a common gain resistor, RG. Since this input stage is balanced, common mode currents will not flow through RG. The common-mode rejection of this circuit is primarily dependent on the resistor matching around A3. When R1 = R2 = R3 = R4, common mode signals will be gained by a factor of one regardless of gain of the front end of the circuit. Consequently, large common mode signals can be handled at all gains as long as the signals stay within A1 and A2 input and output head room limitations. If the common mode errors of the input amplifiers track they will be cancelled by the output stage. If the assumption that R1/R2 equals R3/R4 is not correct, there could be a noticeable common mode voltage error. The calculated common-mode rejection (CMR) error that is attributed to resistor mismatches in this circuit is equal to: An example of the impact of this error is demonstrated with a 12-bit, 5V system, where the gain of the circuit is 100V/V, the common-mode voltage ranges 0 to 5V and the matching error can be as large as ±1%. Using the formula above, the contributed error of this type of common-mode excursion is equal to 1mV. This voltage is slightly less than 1LSB. In a single supply environment, the voltage reference should be equal to the center of the input signals. This voltage is represented in the circuit in Figure 5 as VREF. The purpose and effects of this reference voltage is to simply shift the output signal into the linear region of the amplifier. Figure 5: This is a three op amp implementation of an instrumentation amplifier. VOUT VIN+ 1 2RF2 RG + ------------- R4 R1 R2 + (R3 R4 )R1 + --------------------------------- – = VIN- 1 2RF1 RG + ------------- R2 R1 ------ VREF R3 R1 R2 + (R3 R4 )R1 + --------------------------------- + VOUT VIN+ VIN- ( ) – 1 2RF RG ---------- VREF + + = CMR 100* 1 R2 R1 + ------ ( ) % of mismatch error ---------------------------------------------------------- for R1 R3 and R2 = R4 = = RG VINVIN+ RF1 RF2 R1 R3 R2 R4 VOUT VREF VOUT 1 2RF RG + ---------- VIN+ VIN- ( ) – VREF = + Where RF1 = RF2 and R1 = R2 = R3 = R4 + - MCP604 A2 A3 A1 MCP604 MCP604 - - + +