1.3 Instruction Execution(4/ 9) Two stages of each instruction execution Processor reads/loads/ fetches instructions from memory Processor executes each instruction Fetch Stage Execute Stage Fetch Next Execute START HALT Instruction Figure 1.2 Basic Instruction Cycle
1.3 Instruction Execution (4/9) • Two stages of each Instruction Execution • Processor reads/loads/Fetches instructions from memory • Processor Executes each instruction 16
1.3 Instruction Execution(5/ 9) Fetch phase Fetch the next instruction and store it in the Instruction register Execute phase The alu or i/o unit executes the instruction . alu does calculations I/O unit loads or stores data between main memory and registers
1.3 Instruction Execution (5/9) • Fetch Phase • Fetch the next instruction and store it in the instruction register • Execute Phase • The ALU or I/O unit executes the instruction • ALU does calculations • I/O unit loads or stores data between main memory and registers 17
1.3 Instruction Execution(6/ 9) The von neumann loop PC <machine start address> Program in memory Opecodel Operand1 IR= memory[PC] Opcode. Operand Program1 haltFlag= CLEAR PC data 1 while(halt lag not SET( R execute(IR) PC=PC Sizeof(INSTrUCt) iR= memory[PC]; //fetch phase CPU
1.3 Instruction Execution (6/9) The von Neumann Loop： PC = <machine start address>; IR = memory[PC]; haltFlag = CLEAR; while(haltFlag not SET) { execute(IR); PC = PC + sizeof(INSTRUCT); IR = memory[PC]; // fetch phase }; 18
1.3 Instruction Execution(7/ 9) Types of instructions ° processor- memory processor-I/O data processing control
1.3 Instruction Execution (7/9) • Types of instructions • processor-memory • processor-I/O • data processing • control 19
1.3 Instruction Execution(8/ 9) · An examp|e 15 Address PC (a) Instruction format R 0 15 s Magnitude AC (b)Integer format Program Counter(PC)=Address of instruction Instruction Register(IR)=Instruction being executed CPU Accumulator (AC)=Temporary storage (c)Internal CPU registers 0001= Load Ac from Memory 0010= Store Ac to Memory 0101= Add to ac from memory (a) Partial list of opcodes Figure 1.3 Characteristics of a Hypothetical Machine
1.3 Instruction Execution (8/9) • An Example CPU PC IR AC 20