第一节 集成运放的组成与性能 第二节 运算放大器的基本电路 第三节 集成运放在信号测量及处理方面的应用
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--- Single-transistor amplifiers --- Source followers --- Cascode
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-- PN Junction -- Large-Signal and Small-Signal Models of Bipolar Transistors -- Large-Signal and Small-Signal Models of MOS Transistors -- Comparison of BJT and MOS transistors
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电子科技大学:《模拟集成电路分析与设计 Analysis and Design of Analog Integrated Circuit》课程教学资源(教学大纲,负责人:罗萍)
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❑ 1.1 Introduction ❑ 1.2 Overview on Manufacturing Process ❑ 1.3 The MOS(FET) Transistor ❑ 1.3.1 I-V/C-V characteristics (self-learning) ❑ 1.3.2 SPICE Models ❑ 1.4 Process Variations
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电子科技大学:《高等数字集成电路设计 Advanced Digital Integrated Circuits Design》课程教学资源(教学大纲,负责人:贺雅娟)
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电子科技大学:《ASIC设计 Application Specific Integrated Circuit Design(ASIC)》课程教学资源(课件讲稿)Topic 4 VLSI for DSP
Digital Signal Processing • Signal & System • DSP system • Description for DSP FIR Filter Design & Implement • Digital Filter • Specification Design • Hardware Implementation Some Examples • Digital Down Converter • Central Processing Unit
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Verilog for Verification • Testbench anatomy • Behavioral modeling for Testbench • Some examples Timing specification • Delay model • Timing verification • Pipeline technology Design For Test (DFT) Test vs. Verification Build In Self Test (BIST) Scan and Boundary Scan
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• Synthesizable • Some experiences • Other syntax rules
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FPGA Design Method Design flow & tools Deign Model of Verilog HDL Design style of Verilog HDL Design Examples • RTL level design • Components of Datapath • Components of Controller
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