电子科技大学：《DSP算法实现技术与架构 VLSI Digital Signal Processing Systems Design and Implementation》课程教学资源（教学大纲，凌翔）

第一部分 电子束蒸发镀膜实验 第二部分 光刻实验 第三部分 刻蚀实验

电子科技大学：《半导体封装测试与可靠性 Packaging,Testing and Reliability of Semiconductor》课程教学资源（课件讲稿，思政版）

电子科技大学：《半导体封装测试与可靠性 Packaging,Testing and Reliability of Semiconductor》课程教学资源（教学大纲，思政版）

Digital Signal Processing • Signal & System • DSP system • Description for DSP FIR Filter Design & Implement • Digital Filter • Specification Design • Hardware Implementation Some Examples • Digital Down Converter • Central Processing Unit

Verilog for Verification • Testbench anatomy • Behavioral modeling for Testbench • Some examples Timing specification • Delay model • Timing verification • Pipeline technology Design For Test (DFT) Test vs. Verification Build In Self Test (BIST) Scan and Boundary Scan

• Synthesizable • Some experiences ➢ Balance architecture ➢ Share resources ➢ Gated signal ➢Assignment statement ➢ Accident / Intentional Latch • Other syntax rules

FPGA Design Method Design flow & tools Deign Model of Verilog HDL Design style of Verilog HDL Design Examples • RTL level design • Components of Datapath • Components of Controller

• Topics Covered • Requirements • Others Info

• ASIC Classification • Design Flow and tools • Design Domains & Levels