Network-on-Chif (2/2) Ben abdallah abderazek The University of Aizu E-mail: benab@u-aizuac jp Hong Kong University of Science and Technology, March 2013
Network-on-Chip (2/2) Ben Abdallah Abderazek The University of Aizu E-mail: benab@u-aizu.ac.jp 1 Hong Kong University of Science and Technology, March 2013
Part II: NoC Building Blocks T opolO Routing algorithms Routing Mechanisms Switching Flow Control Router architecture Network Interface
Part II: NoC Building Blocks Topology Routing Algorithms Routing Mechanisms Switching Flow Control Router Architecture Network Interface 2
Part II: NoC Building Blocks T opolO Routing algorithms Routing Mechanisms Switching Flow Control Router architecture Network Interface
Part II: NoC Building Blocks Topology Routing Algorithms Routing Mechanisms Switching Flow Control Router Architecture Network Interface 3
NoC Switching a Switching techniques define the way and time of connections between input and output ports inside a switch a Circuit switched networks reserve a physical path before transmitting the data packets o Packet switched networks transmit the packets without reserving the entire path ng Techniques Circuit switchin Packet Switching Wormhole s&F VⅤ irtual Cut Switching Switchin Through
NoC Switching ❑ Switching techniques define the way and time of connections between input and output ports inside a switch. ❑ Circuit switched networks reserve a physical path before transmitting the data packets ❑ Packet switched networks transmit the packets without reserving the entire path. 4
Circuit Switching Header probe Acknowledgment Data setup data Time Busy Hardware path setup by a routing header or probe End-to-end acknowledgment initiates transfer at full hardware bandwidth
Circuit Switching ❑ Hardware path setup by a routing header or probe ❑ End-to-end acknowledgment initiates transfer at full hardware bandwidth tr ts tsetup tdata Time Busy Header Probe Acknowledgment Data Link ts 6