312汇编语言指令举例:LD命令 ■ Opcode 指令代码_0001000 DIAAAAAAA 1514131211109 00 AAA AAA A 15141312111098765 0100010D A AA A 4 15141312111098 6 43210 01101111 A 5A0 A AH AAA 0000110D01 F T 1514131211109876543210 1001010DXX× X SH F4T
3.1.2 汇编语言指令举例： LD命令 17 指令代码
312汇编语言指令举例:LD命令 6 指令代码 151413121110 87654321 1110 DK KKKKKKK 1514131211109876543210 1111000D0010sHFT 16-bit constant 8: 1514131211109876543210 1111 00D0 100010 16-bit constant 1514131211109876543210 111101sD10000010 10: 1514131211109876543210 111101sD010sH1F18
3.1.2 汇编语言指令举例： LD命令 18 指令代码
312汇编语言指令举例:LD命令 Execution 1:(Smem)→dst 1: LD Smem. dst 执行 2:(Smem)<< TS- dst 2: LD Smem, TS, dst 3:(Smem)<< 16->dst 3: LD Smem, 16, dst 4:(Smem)<SHFT→dst4: LD Smem[,SH∥FT],dst 5:(Xmem)<< SHFT-dst 5: LD Xmem, SHFT, dst 6:K→dst 6: LD #K dst 7: lk < SHFT- dst 7: LD #lk[ SHFTI, dst 8:k<<16→dst 8: LD #/k 16. dst 9:(src)<< ASM>dst 9: LD srC, ASM[, dst] 10:(src)<SHFT→dst10: LD Src, SH∥FT,ast Status Bits Affected by sXm in all accumulator loads 状态位 Affected by ovm in loads with SHiFt or ASM shift Affects OVdst (or OVsrc, when dst= src)in loads with SHIFT or ASM shift Description This instruction loads the accumulator(dst, or src if dst is not specified )with 说明 a data-memory value or an immediate value, supporting different shift quanti- ties. Additionally, the instruction supports accumulator-to-accumulator moves with shift
3.1.2 汇编语言指令举例： LD命令 19 执行 状态位 说明
312汇编语言指令举例:LD命令 Noes:注意事项 The following syntaxes are assembled as a different syntax in certain cases u Syntax 4: If SHIFT=0, the instruction opcode is assembled as syntax 1 Q Syntax 4: If 0< SHIFT s 15 and Smem indirect addressing mode is included in Xmem, the instruction opcode is assembled as syntax 5 O Syntax 5: If SHFT=0, the instruction opcode is assembled as syntax 1 a Syntax 7: If SHFT=0 and 0 s lks 255, the instruction opcode is assembled as syntax 6
3.1.2 汇编语言指令举例： LD命令 20 注意事项
312汇编语言指令举例:LD命令 Words Syntaxes 1, 2, 3, 5, 6, 9, and 10: 1 word Syntaxes 4, 7, and 8: 2 words 指令字长 Add 1 word when using long-offset indirect addressing or absolute addressing with an smem Cycles Syntaxes 1, 2, 3, 5, 6, 9, and 10: 1 cycle Syntaxes 4, 7, and 8: 2 cycles 周期数 Add 1 cycle when using long-offset indirect addressing or absolute addressing with an Smem 1: LD Smem. dst 2. LD Smem TS dst Classes Syntaxes 1, 2, 3, and 5: Class 3A (3: LD Smem,16,dst 类型 Syntaxes1,2 and 3: Class38(se4: mem[, SHIFT, ds Syntax 4: Class 4A(see page 3-7)5: LD Xmem, SHFT, dst Syntax 4: Class 4B(see page 3-8)6: LD #K, dst Syntaxes 6, 9, and 10: Class 1(se 8 7: LD #/k[ SHFT], dst LD #k 16. dst Syntaxes 7and 8: Class 2( see pa! 9: LD src, ASM [ dst] 10: LD src[ SH/FTI, dst
3.1.2 汇编语言指令举例： LD命令 21 指令字长 周期数 类型