5.2 时钟系统STM32F407时钟系统配置HCLK-168MHzPCLK2=84MHzAPB2定时器时钟HSE12MHz三-MVCOx2OSCTIMxCLK=-168MHzPLL_M=12PLL _P=2PCLK1=42MHz-NAPB1定时器时钟PLLN=336-4XTIMxCLK=84MHz在systemstm32f4xx.c中设置系统时钟频率=12MHz×N/(MXP)=12×336/(12×2)=168MHzsystem_stm32f4xx.c SystemInitO → SetSysClockO电子系统设计
电子系统设计 STM32F407时钟系统配置 系统时钟频率=12MHz×N/(M×P)=12×336/(12×2)=168MHz 5.2 时钟系统 system_stm32f4xx.c SystemInit() SetSysClock()
5.2时钟系统stm32f4××.h函数中定义外部晶振频率main.cstm32f4xxadc.hstm32f4xxconf.hLcD.hstm32f4xx.h白#if!defined(HSEVALUE)#defineHSEVALUE((uint32 t)12000000)/*l<Value of the External oscillator in Hz*)#endif/*HSEVALUE*/电子系统设计
电子系统设计 stm32f4××.h函数中定义外部晶振频率 5.2 时钟系统
5.2 时钟系统LCD.hFONT.hmain.c/WAVEDAT.h/LCD.csystemstm32f4xx.cstm32f4xx.hstm32f4xxit.cThis valuemust bea multipleof Ox200.*/★+PlParameters#ifdefined(SIM32F40_41xxx)1ldefined(STM32F427437xx)defined(STM32F429439xx)ll日/PLLVCO=(HSEVALUEOYHSIVALUE/PLLM)*PLLN*/12#define PLL M#else/+STM32F411xE*#if defined (USE HSE BYPASS)日9#define PLL M#else/*STM32F411xE*/16#define PLL M#endif/* USE HSE BYPASS*/#endif/+STM32F4041xxx11STM32F427437xx1ISTM32F429439xx11STM32F401xx**USBOTGFS,SDIOandRNGCIOCk=PLLVCO/PLLQ*/7#define PLL Q日#ifdefined(STM32F40_41xxx)#define PLL N336/SYSCLR=PLLVCO/PLLP*#define PLL P2#endif/*STM32F4041xxx*/电子系统设计
电子系统设计 5.2 时钟系统
LCD.h|FONT.h|main.C/WAVEDAT.h|LCD.csystemstm32f4xx.cstm32f4xx.h|stm32f4xxit.cvoid SystemInit(void)/+FPU settingsif(FPU PRESENTFPU USED=1)SCB->CPACR1((3UL3UIsetcPioand cPilFullAccess*<<11*2)0:#endif/* Reset the Rcc clock configuration to the default reset state/* Set HSIONbit */5.2Rcc->cR1=(uint32_t)0x00000001;/ Reset CFGR register */时钟系统RCC->CFGR=0x00000000;/+ResetHSEON,CSsONand PLLON bits*RCC->CR &= (uint32 t)OxFEF6FFFE;/tReset PLLCFGR registertRCC->PLLCFGR=0x24003010:/* Reset HSEBYP bit*/RCC->CR &=(uint32t)OxFFFBFEFE:/*Disable all interrupts*/RCC->CIR0x00000000;#if defined (DAIAIN ExtSRAM)IIdefined (DATA IN ExtSDRAM)SystemInit ExtMemCtl(:EndiF/*DATAIN EXtSRAMIIDATAIN EXtSDRAM+/* Configure the System clock source,PLL Multiplier and Divider factorsAHB/APBx prescalers and Flash settingsSetsysclock();
电子系统设计 5.2 时钟系统
5.3通用输入输出端口GPIOIO端口基本结构模拟去片内复用功能输入VDD开/关VDD-FT外设文拉输入数据读保护电阻寄存器0二极管开/关施密特触发器oto口V0引脚输出数据置位/复位开/关写保护VDD木寄存器寄存器拉极管电阻读/写gPMOS输出VssVss复用功能输出来自片控制内外设NMOSVss推拉、开漏、高阻模拟电子系统设计
电子系统设计 5.3 通用输入输出端口GPIO I/O端口基本结构