312汇编语言指令举例:LD命令 Opcode 15141312111098765432 0001000D1A AAAA A 1514131211109876543210 0 1010 DIA AA 15141312111098765432 0100010D AAAAAA A 15141312111098765432 01101111A AA AA A A 0000110D010sH1FT 15141312111098 65432 0 1001010DX× XX SH F T
3.1.2 汇编语言指令举例： LD命令
312汇编语言指令举例:LD命令 Execution 1:(Smem)→dst 1: LD Smem. dst 2:(Smem)<<Ts→dst 2: LD Smem TS dst 3:(Smem)<16→dst 3: LD Smem. 16. dst 4:(Smem)<SHFT→dst4: LD Smem[,SH∥FT],ast 5:(Xmem)<< SHFT -dst 5: LD Xmem, SHFT dst 6:K→dst 6: LD #K dst 7:k<<SHFT→dst 7: LD #/k[ SHFT], dst 8:k<<16→dst 8: LD #/k 16. dst 9:(src)<ASM→dst 9: LD src, ASM[, dst 10:(sc)<<SHFT→dst 10: LD src[ SHIFT], dst Status Bits Affected by sXM in all accumulator loads Affected by ovm in loads with SHiFT or ASM shift Affects ODst(or OVsrc, when dst =src)in loads with SHIFT or ASM shift Description This instruction loads the accumulator (dst, or src if dst is not specified) with a data-memory value or an immediate value, supporting different shift quanti ties. Additionally, the instruction supports accumulator-to-accumulator moves With shift
3.1.2 汇编语言指令举例： LD命令
312汇编语言指令举例:LD命令 Notes: The following syntaxes are assembled as a different syntax in certain cases a Syntax 4: If SHIFT=0, the instruction opcode is assembled as syntax 1 Q Syntax 4: If 0< SHIFT s 15 and Smem indirect addressing mode is included in Xmem, the instruction opcode is assembled as syntax 5 Q Syntax 5: If SHFT=0, the instruction opcode is assembled as syntax 1 a Syntax 7: If SHFT=0 and 0 s lk s 255, the instruction opcode is assembled as syntax 6
3.1.2 汇编语言指令举例： LD命令
312汇编语言指令举例:LD命令 Words Syntaxes 1, 2. 3. 5. 6. 9, and 10: 1 word Syntaxes 4, 7, and 8: 2 words Add 1 word when using long-offset indirect addressing or absolute addressing with an Smem Cycles Syntaxes 1, 2, 3, 5, 6, 9, and 10: 1 cycle Syntaxes 4, 7, and 8: 2 cycles Add 1 cycle when using long-offset indirect addressing or absolute addressing with an smem classes Syntaxes 1, 2, 3, and 5: Class 3A(see page 3-5) Syntaxes 1, 2, and 3: Class 3B (see page 3-6) Syntax 4: Class 4A (see page 3-7) Syntax 4: Class 4B(see page 3-8) Syntaxes 6, 9, and 10: Class 1 (see page 3-3) Syntaxes 7 and 8: Class 2(see page 3-4)
3.1.2 汇编语言指令举例： LD命令
312汇编语言指令举例:LD命令 Example 1 Ld *Ar1, A Before Instruction After Instruction 0000000000 000000FEDC SXM 0 SXM AR1 0200 AR1 0200 Data Memory 0200h FEDC0200h FEDC Example 2 Ld*Arl,A Before Instruction After Instruction 0000000000 FF FFFF FEDC SXM 1 SXM 1 AR1 0200 AR1 0200 Data Memory 0200h FEDC 0200h FED
3.1.2 汇编语言指令举例： LD命令