Stage Computation: rmmovl P283 Figure 4.17 cmmon⊥rA,D(rB) icode:ifun←-M1[Pc] Read instruction byte rA:rB←MPc+1] Read register byte Fetch va|c←M4DPc+2] Read displacement d vaIP tPC+6 Compute next PC vaA←R[A Read operand a Decode vaB←R[rB] Read operand B vale t valB vaIc Compute effective address Execute (sum of the displacement and the Memory MA[ValE]+valA Write value to memory Write back PC update PC←vaP Update Pc a Use ALU for address com putation Processor
– 16 – Processor Stage Computation: rmmovl P283 Figure 4.17 ◼ Use ALU for address computation rmmovl rA, D(rB) icode:ifun M1 [PC] rA:rB M1 [PC+1] valC M4 [PC+2] valP PC+6 Fetch Read instruction byte Read register byte Read displacement D Compute next PC valA R[rA] valB R[rB] Decode Read operand A Read operand B valE valB + valC Execute Compute effective address (sum of the displacement and the base register value) M4 Memory [valE] valA Write value to memory Write back PC update PC valP Update PC
Executing mrmovl mrmovl D(rB), A 5O rB D Fetch Memory Read 6 bytes Read from memory Decode Write back Read operand registers rB Update register rA Execute PC Update Compute effective address ■ ncrement Pc by6 Processor
– 17 – Processor Executing mrmovl Fetch ◼ Read 6 bytes Decode ◼ Read operand registers rB Execute ◼ Compute effective address Memory ◼ Read from memory Write back ◼ Update register rA PC Update ◼ Increment PC by 6 mrmovl D(rB),rA 5 0 rA rB D
Stage Computation: mrmovl P283 Figure 4.17 mrmovl D(rB),rA icode:ifun←-M1[Pc] Read instruction byte rA:rB←MPc+1] Read register byte Fetch va|c←M4DPc+2] Read displacement d vaIP tPC+6 Compute next PC Decode vaB←RB Read operand B vale t valB vaIc Compute effective address Execute Memory vaM←MaE Read data from memory Write back R[rA]←vaM Update register rA PC update PC←vaP Update Pc a Use ALU for address com putation Processor
– 18 – Processor Stage Computation: mrmovl P283 Figure 4.17 ◼ Use ALU for address computation mrmovl D(rB) , rA icode:ifun M1 [PC] rA:rB M1 [PC+1] valC M4 [PC+2] valP PC+6 Fetch Read instruction byte Read register byte Read displacement D Compute next PC valB R[rB] Decode Read operand B valE valB + valC Execute Compute effective address valM M4 Memory [valE] Read data from memory R[rA] valM Write back Update register rA PC update PC valP Update PC
Figure 4.18 P284 Executing pushl pushl rA aorA8 Fetch Memory Read 2 bytes Store vala at the address of Decode new stack pointer Read stack pointer and rA Write back Execute Update stack pointer m Decrement stack pointer by PC Update Increment Pc by 2 Processor
– 19 – Processor Figure 4.18 P284 Executing pushl Fetch ◼ Read 2 bytes Decode ◼ Read stack pointer and rA Execute ◼ Decrement stack pointer by 4 Memory ◼ Store valA at the address of new stack pointer Write back ◼ Update stack pointer PC Update ◼ Increment PC by 2 pushl rA a 0 rA 8
Stage Computation: pushl P284 Figure 4.18 pushl rA icode:ifun←-M1[Pc] Read instruction byte rA:rB←M1[Pc+们 Read register byte Fetch vaIP tPC+2 Compute next PC valA RrA Read valA Decode vaB←R[8es] Read stack pointer vaE←vaB+(-4 Decrement stack pointer Execute Memory MAlva← valA Store to stack Write R[各esp]<va Update stack pointer back 在 write back之前实际上写入的元素在堆 PC update PC←vaP Update Pc a Use ALU to Decrement stack pointer -20 Processor
– 20 – Processor Stage Computation: pushl P284 Figure 4.18 ◼ Use ALU to Decrement stack pointer pushl rA icode:ifun M1 [PC] rA:rB M1 [PC+1] valP PC+2 Fetch Read instruction byte Read register byte Compute next PC valA R[rA] valB R [%esp] Decode Read valA Read stack pointer valE valB + (-4) Execute Decrement stack pointer M4 Memory [valE] valA Store to stack Write R[%esp] valE back Update stack pointer *在write back之前实际上写入的元素在堆 栈外。 PC update PC valP Update PC