Moore’sLaW 10° MOS Arrays▲ MOS Logi1975 Actual Data26M517 108.1975 Projection 好 NUMBER OF COMPONENTS PER INTD 100 19601965197019751980198519901995200020052010 88:88s Cramming More Components onto Integrated circuits Gordon Moore, Electronics, 1965 f on transistors on cost-effective integrated circuit double every 18 months 2021/130 中国科学技术大学 Chapter.30 30
2021/1/30 中国科学技术大学 Chapter1.30 Moore’s Law • “Cramming More Components onto Integrated Circuits” – Gordon Moore, Electronics, 1965 • # on transistors on cost-effective integrated circuit double every 18 months 30
Abstraction via Layers of Representation High Level Language em Vk Program(e.g. C) vkk=vk+ vk+们=temp; Compiler Assembly Language sto, o($2 Anything can be represented Program(e.g. MIPS) sw$t1,0($2 as a number sw $to, 4($ L.e. data or instructions Assembler Machine Language 00001001110001101010111101011000 Program(MIPS) 10101111010110000000100111000110 11000110101011110101100000001001 01011000000010011100011010101111 Machine Interpretation Register File Hardware Architecture Description (e.g., block diagrams) ALU Architecture Implementation Logic circuit Description (Circuit Schematic Diagrams) 回回回回 5U2021 科
Abstraction via Layers of Representation 1/30/2021 中国科学技术大学 31 lw $t0, 0($2) lw $t1, 4($2) sw $t1, 0($2) sw $t0, 4($2) High Level Language Program (e.g., C) Assembly Language Program (e.g., MIPS) Machine Language Program (MIPS) Hardware Architecture Description (e.g., block diagrams) Compiler Assembler Machine Interpretation temp = v[k]; v[k] = v[k+1]; v[k+1] = temp; 0000 1001 1100 0110 1010 1111 0101 1000 1010 1111 0101 1000 0000 1001 1100 0110 1100 0110 1010 1111 0101 1000 0000 1001 0101 1000 0000 1001 1100 0110 1010 1111 Logic Circuit Description (Circuit Schematic Diagrams) Architecture Implementation Anything can be represented as a number, i.e., data or instructions
Make the Common Case Fast ·在进行设计选择时,经常发生的事件优先 ·优化不经常执行的代码意义不大 ·选择一种(性能)度量方式来确定经常性事件( Common case Capability Capacity 1/30/2021 中国科学技术大学
Make the Common Case Fast • 在进行设计选择时，经常发生的事件优先 • 优化不经常执行的代码意义不大 • 选择一种（性能）度量方式来确定经常性事件（Common case) 1/30/2021 中国科学技术大学 32 Capability Capacity
Dependability via redundancy 通过冗余使得部分部件失效不影响整个系统的运行 2 of 3 agree 1+1=2 1+1=2 1+1=2 FAILI Increasing transistor density reduces the cost of redundancy 1/30/2021 中国科学技术大学
Dependability via Redundancy • 通过冗余使得部分部件失效不影响整个系统的运行 1/30/2021 中国科学技术大学 33 1+1=2 1+1=2 1+1=1 1+1=2 2 of 3 agree FAIL! Increasing transistor density reduces the cost of redundancy
Memory hierarchy Processor SUPER FAST PER EXPENSIVE CPU TINY CAPACITY Fast, Expensive but Small REGiSTER CPU CACHE FASTER LEVEL 1(L1) CACHE EXPENSIV SMALL CAPACITY LEVEL 2(L2) CACHE LEVEL 3(L3) CACHE EDO. SD.RAM, DDR-SDRAM, RD-RAM PHYSICAL MEMORY FAST PRICED REASONABLY and More RAMDOM ACCESS MEMORY(RAM) AVERAGE CAPACITY SSD. Flash Drive SOLID STATE MEMORY AVERAGE SPEED PRICED REASONABLY AVERAGE CAPACITY NON-VOLATILE FLASH- BASED MEMORY Mechanical Hard Drives VIRTUALMEMORY SLOW CHEAP FILE- BASED MEMORY LARGE CAPACTITY Cheap 1/30/2021 中国科学技术大学 arge but Slow
Memory Hierarchy 1/30/2021 中国科学技术大学 34 Fast, Expensive, but Small Cheap, Large, but Slow