a voltage to bias the or i the previous example. If the user then tried to increase the output current above 10 A, SPICE would not be able to converge because the regulator will not allow such a large current. AC Analysis calculating the gain. 3 dB frequency input and output impedance, and noise of a circuit as a function of Numerical Method 1. A DC solution is performed to calculate the Q-point for the circuit. 2. A linearized circuit is constructed at the Q point. To do this, all nonlinear elements are replaced by their linearized equivalents. For example, a nonlinear current source I=avi+ bv would be replaced by a linear voltage controlled current source I= V(2av1a)+ V(3bv2d 3. All inductors and capacitors are replaced by complex impedances, and conductances evaluated at the quency of interest. 4. Nodal analysis is now used to reduce the circuit to a linear algebraic complex matrix. The AC node ly now be found by applying an excitation vector(which represents the independent voltage and current sources)and using Gaussian elimination(with complex arithmetic) to calculate the node voltages. AC analysis does have limitations and the following types of nonlinear or large signal problems cannot be modeled 1. Distortion due to nonlinearities such as clipping, etc. 2. Slew rate-limiting effects 3. Analog mixers 4. Oscillators Noise analysis is performed by including noise sources in the models. Typical noise sources include thermal oise in resistors I=4kTAf/R, and shot I=2qL, Af, and flicker noise in semiconductor devices. Here, T temperature in Kelvins, k is Boltzmann's constant, and Af is the bandwidth of the circuit. These noise sources are inserted as independent current sources, In; (f)into the AC model. The resulting current due to the noise ource is then calculated at a user-specified summation node(s) by multiplying by the gain function between the noise source and the summation node Ai (). This procedure is repeated for each noise source and the the contributions at the reference node are root mean squared(RMS) summed to give the total noise at the reference node. The equivalent input noise is then easily calculated from the transfer function between the ircuit input and the reference node Ais f). The equation describing the input noise is therefore: 1=AO0240mO Example 13.2. Cascode Amplifier with Macro Models: Here, we find the gain, bandwidth, input impedance, and output noise of a cascode amplifier. The circuit for the amplifier is shown in Fig. 13.5. The circuit is assumed to be fabricated in a monolithic IC process, so it will be necessary to consider some of the parasitics of the IC process. A cross-section of a typical IC bipolar transistor is shown in Fig. 13. 4 along with some of the parasitic elements. These parasitic elements are easily included in the amplifier by creating a"macro model"for each transistor. The macro model is then implemented in SPICE form using subcircuits. The input to the circuit is a voltage source(VIN), applied differentially to the amplifier. The output will be taken differentially across the collectors of the two upper transistors at nodes 2 and 3. The input impedance of the amplifier can be calculated as VIN/I(VIN) or because vin =1.0 just as 1/I(VIN). These quantities are shown plotted using PROBE in Fig. 13.6. It can be seen that the gain of the amplifier falls off at high frequency c 2000 by CRC Press LLC
© 2000 by CRC Press LLC a voltage to bias the output in the previous example. If the user then tried to increase the output current above 10 A, SPICE would not be able to converge because the regulator will not allow such a large current. AC Analysis Ac analysis uses phasor analysis to calculate the frequency response of a circuit. The analysis is useful for calculating the gain. 3 dB frequency input and output impedance, and noise of a circuit as a function of frequency, bias conditions, temperature, etc. Numerical Method 1. A DC solution is performed to calculate the Q-point for the circuit. 2. A linearized circuit is constructed at the Q point. To do this, all nonlinear elements are replaced by their linearized equivalents. For example, a nonlinear current source I = aV1 2 + bV2 3 would be replaced by a linear voltage controlled current source I = V1 (2aV1q ) + V2(3bV2q 2 ). 3. All inductors and capacitors are replaced by complex impedances, and conductances evaluated at the frequency of interest. 4. Nodal analysis is now used to reduce the circuit to a linear algebraic complex matrix. The AC node voltages may now be found by applying an excitation vector (which represents the independent voltage and current sources) and using Gaussian elimination (with complex arithmetic) to calculate the node voltages. AC analysis does have limitations and the following types of nonlinear or large signal problems cannot be modeled: 1. Distortion due to nonlinearities such as clipping, etc. 2. Slew rate-limiting effects 3. Analog mixers 4. Oscillators Noise analysis is performed by including noise sources in the models. Typical noise sources include thermal noise in resistors In 2 = 4kT Df /R, and shot In 2 = 2qId Df , and flicker noise in semiconductor devices. Here, T is temperature in Kelvins, k is Boltzmann’s constant, and Df is the bandwidth of the circuit. These noise sources are inserted as independent current sources, Inj(f ) into the AC model. The resulting current due to the noise source is then calculated at a user-specified summation node(s) by multiplying by the gain function between the noise source and the summation node Ajs(f ). This procedure is repeated for each noise source and then the contributions at the reference node are root mean squared (RMS) summed to give the total noise at the reference node. The equivalent input noise is then easily calculated from the transfer function between the circuit input and the reference node Ais(f ). The equation describing the input noise is therefore: Example 13.2. Cascode Amplifier with Macro Models: Here, we find the gain, bandwidth, input impedance, and output noise of a cascode amplifier. The circuit for the amplifier is shown in Fig. 13.5. The circuit is assumed to be fabricated in a monolithic IC process, so it will be necessary to consider some of the parasitics of the IC process. A cross-section of a typical IC bipolar transistor is shown in Fig. 13.4 along with some of the parasitic elements. These parasitic elements are easily included in the amplifier by creating a “macro model” for each transistor. The macro model is then implemented in SPICE form using subcircuits. The input to the circuit is a voltage source (VIN), applied differentially to the amplifier. The output will be taken differentially across the collectors of the two upper transistors at nodes 2 and 3. The input impedance of the amplifier can be calculated as VIN/I(VIN) or because VIN = 1.0 just as 1/I(VIN). These quantities are shown plotted using PROBE in Fig. 13.6. It can be seen that the gain of the amplifier falls off at high frequency I A f A f In f i is js j j = ( ) Â[ ] ( ) ( ) 1 2
c FIGURE 13.4 BT cross-section with macro model elements VCC 手6 3 8 10 FIGURE 13.5 Cascode amplifier for AC analysis, created using PSPICE 1,K1230V AGain Zin r requency FIGURE 13.6 Gain and input impedance of cascode amplifie c 2000 by CRC Press LLC
© 2000 by CRC Press LLC FIGURE 13.4 BJT cross-section with macro model elements. FIGURE 13.5 Cascode amplifier for AC analysis, created using PSPICE. FIGURE 13.6 Gain and input impedance of cascode amplifier
as expected. The input impedance also drops because parasitic capacitances shunt the input. This example took 1 min on an ibm pc Pitfalls. Many novice users will forget that AC analysis is a linear analysis. They will, for example, apply a 1-V signal to an amplifier with 5-V power supplies and a gain of 1000 and be surprised when SPICe tells them that the output voltage is 1000 V. Of course, the voltage generated in a simple amplifier must be less than the power supply voltage, but to examine such clipping effects, transient analysis must be used. Likewise, selection of a proper Q point is important. If the amplifier is biased in a saturated portion of its response and ac analysis is performed, the gain reported will be much smaller than the actual large signal gain. Transient Analysis Transient analysis is the most powerful analysis capability of a simulator because the transient response is so hard to calculate analytically. Transient analysis or many types of analysis, distortion, basic operation of certain circuits like switching power supplies. Transient analysis is also the most CPU intensive and can require 100 or 1000 times the CPU time as a dC or AC analysis Numerical Method In a transient analysis time is discretized into intervals called time steps. Typically the time steps are of unequal ength, with the smallest steps being taken during portions of the analysis when the circuit voltages and currents are changing most rapidly. The capacitors and inductors in the circuit are then replaced by voltage and current sources based on the following procedure. The current in a capacitor is given by I= Cav/dt. The time derivative can be approximated by a difference In this equation the superscript k represents the number of the time step. Here, k is the time step we are presently solving for and (k-1)is the previous time step. This equation can be solved to give the capacit current at the present time step. =V(2C△)-V-(2C△)-1 Here, At=tk-re-l, or the length of the time step. As time steps are advanced, V-1- V5: 15-l, I2. Note that the second two terms on the right hand side of the above equation are dependent only on the capacitor voltage and current from the previous time step, and are therefore fixed constants as far as the present step is concerned. The first term is effectively a conductance(g= 2C/An)multiplied by the capacitor voltage, and the econd two terms could be represented by an independent current source. The entire transient model for the capacitor therefore consists of a conductance in parallel with two current sources( the numerical values of these are, of course, different at each time step). Once the capacitors and inductors have been replaced as indicated, the normal method of DC analysis is used. One complete DC analysis must be performed for each time point. This is the reason that transient analysis is so CPU intensive. The method outlined here is the trapezoidal time integration method and is used as the default in SPICe. Example 133. Phase-Locked Loop Circuit: Figure 13.7 shows the phase-locked loop circuit. The phase detector and voltage-controlled oscillator are modeled in separate subcircuits. Examine the VCO subcircuit and note the PULSE-type current source ISTART connected across the capacitor. The source gives a current pulse 03. E-6 s wide at the start of the simulation to start the vco running. To start a transient simulation SPICE first computes a DC operating point(to find the initial voltages Ve- on the capacitors). As this dC point is a valid, although not necessarily stable, solution, an oscillator will remain at this point indefinitely unless some perturbation is applied to start the oscillations. Remember, this is an ideal mathematical model and no noise c 2000 by CRC Press LLC
© 2000 by CRC Press LLC as expected. The input impedance also drops because parasitic capacitances shunt the input. This example took <1 min on an IBM PC. Pitfalls. Many novice users will forget that AC analysis is a linear analysis. They will, for example, apply a 1-V signal to an amplifier with 5-V power supplies and a gain of 1000 and be surprised when SPICE tells them that the output voltage is 1000 V. Of course, the voltage generated in a simple amplifier must be less than the power supply voltage, but to examine such clipping effects, transient analysis must be used. Likewise, selection of a proper Q point is important. If the amplifier is biased in a saturated portion of its response and AC analysis is performed, the gain reported will be much smaller than the actual large signal gain. Transient Analysis Transient analysis is the most powerful analysis capability of a simulator because the transient response is so hard to calculate analytically. Transient analysis can be used for many types of analysis, such as switching speed, distortion, basic operation of certain circuits like switching power supplies. Transient analysis is also the most CPU intensive and can require 100 or 1000 times the CPU time as a DC or AC analysis. Numerical Method In a transient analysis time is discretized into intervals called time steps. Typically the time steps are of unequal length, with the smallest steps being taken during portions of the analysis when the circuit voltages and currents are changing most rapidly. The capacitors and inductors in the circuit are then replaced by voltage and current sources based on the following procedure. The current in a capacitor is given by Ic = CdVc /dt. The time derivative can be approximated by a difference equation: In this equation the superscript k represents the number of the time step. Here, k is the time step we are presently solving for and (k – 1) is the previous time step. This equation can be solved to give the capacitor current at the present time step. Here, Dt = t k – tk–1, or the length of the time step. As time steps are advanced, Vc k–1 Æ Vc k ; Ic k–1 Æ Ic k . Note that the second two terms on the right hand side of the above equation are dependent only on the capacitor voltage and current from the previous time step, and are therefore fixed constants as far as the present step is concerned. The first term is effectively a conductance (g = 2C/Dt) multiplied by the capacitor voltage, and the second two terms could be represented by an independent current source. The entire transient model for the capacitor therefore consists of a conductance in parallel with two current sources (the numerical values of these are, of course, different at each time step). Once the capacitors and inductors have been replaced as indicated, the normal method of DC analysis is used. One complete DC analysis must be performed for each time point. This is the reason that transient analysis is so CPU intensive. The method outlined here is the trapezoidal time integration method and is used as the default in SPICE. Example 13.3. Phase-Locked Loop Circuit: Figure 13.7 shows the phase-locked loop circuit. The phase detector and voltage-controlled oscillator are modeled in separate subcircuits. Examine the VCO subcircuit and note the PULSE-type current source ISTART connected across the capacitor. The source gives a current pulse 03.E-6 s wide at the start of the simulation to start the VCO running. To start a transient simulation SPICE first computes a DC operating point (to find the initial voltages Vc k–1 on the capacitors). As this DC point is a valid, although not necessarily stable, solution, an oscillator will remain at this point indefinitely unless some perturbation is applied to start the oscillations. Remember, this is an ideal mathematical model and no noise I I C V V t t c k c k c k c k k k + = - - - - - 1 1 1 2 I V C t V C t I c k c k c k c k = ( ) - ( ) - - - 2 2 1 1 D D
MULTIPLIER ut 女 800K “式“ 7 M10 vCO FIGURE 13. 7 Phase-locked loop circuit for transient analysis, created with PSPICE. sources or asymmetries exist that would start a real oscillator--it must be done manually. The capacitor CI would have to be placed off-chip, and bond pad capacitance(CPADI and CPAD2)have been included at the capacitor nodes. Including the pad capacitances is very important if a small capacitor Cl is used for high frequency operation In this example, the Pll is to be used as a FM detector circuit and the FM signal is applied to the input using a single frequency FM voltage source. The carrier frequency is 600 kHz and the modulation frequency is 60 kHz. Figure 13.8 shows the input voltage and the output voltage of the PlL at the vCo output and at the phase detector output. It can be seen that after a brief starting transient, the PLL locks onto the input signal Loop Filter output 3.0vr 工 nput signa 中与1 FIGURE 13.8 Transient analysis results of PLL circuit, created using PSPICE c 2000 by CRC Press LLC
© 2000 by CRC Press LLC sources or asymmetries exist that would start a real oscillator—it must be done manually. The capacitor C1 would have to be placed off-chip, and bond pad capacitance (CPAD1 and CPAD2) have been included at the capacitor nodes. Including the pad capacitances is very important if a small capacitor C1 is used for highfrequency operation. In this example, the PLL is to be used as a FM detector circuit and the FM signal is applied to the input using a single frequency FM voltage source. The carrier frequency is 600 kHz and the modulation frequency is 60 kHz. Figure 13.8 shows the input voltage and the output voltage of the PLL at the VCO output and at the phase detector output. It can be seen that after a brief starting transient, the PLL locks onto the input signal FIGURE 13.7 Phase-locked loop circuit for transient analysis, created with PSPICE. FIGURE 13.8 Transient analysis results of PLL circuit, created using PSPICE
Process Device Parameter Simulation Simulation Extraction Simulation Netlist Extraction Simulation FIGURE 13.9 Data flow for complete process-device- circuit modeling. and that the phase detector output has a strong 60-kHz component. This example took 251 s on a Sun SPARC-2 workstation(3046 time steps, with an average of 5 Newton iterations per time step) Pitfalls. Occasionally SPICE will fail and give the message Timestep too small in transient ana which means that the process of Newton iterations at certain time steps could not be made to converge. One of the most common causes of this is the specification of a capacitor with a value that is much too large, for example, specifying a 1-F capacitor instead of a I pF capacitor(an easy mistake to make by not adding the"p"in the value specification). Unfortunately, we usually have no way to tell which capacitor is at fault from the type of failure generated other than to manually search the input deck. Other transient failures are caused by MOSFET models. Some models contain discontinuous capacitan (with respect to voltage)and others do not conserve charge. These models can vary from version to version so it is best to check the users guide Process and device simulation Process and devices simulation are the steps that precede analog circuit simulation in the overall simulation flow(see Fig. 13.9). The simulators are also different in that they are not measurement driven as are analog circuit simulators. The input to a process simulator is the sequence of process steps performed(times, temper atures, gas concentrations)as well as the mask dimensions. The output from the process simulator is a detailed description of the solid-state device(doping profiles, oxide thickness, junction depths, etc. ) The input to the device simulator is the detailed description generated by the process simulator(or via measurement ). The output of the device simulator is the electrical characteristics of the device(Iv curves, capacitances, switching transient curves) rocess and device simulation are becoming increasingly important and widely used during the integrated circuit design process. A number of reasons exist for this As device dimensions shrink, second-order effects can become dominant. Modeling of these effects is Computers have greatly improved, allowing time-consuming calculations to be performed in a reasonable mulation allows access to impossible to measure physical characteristics Analytic models are not available for certain devices, for example, thyristors, heterojunction devices and GBTS Analytic models have not been developed for certain physical phenomena, for example, single event upset, hot electron aging effects, latchup, and snap-back Simulation runs can be used to replace split lot runs. As the cost to fabricate test devices increases, this dvantage becomes more important Simulation can be used to help device, process, and circuit designers understand how their devices and Clearly, process and device simulation is a topic which can be and has been the topic of entire texts. The following sections attempt to provide an introduction to this type of simulation, give several examples showing what the simulations can as h, and provide references to additional sources of information c 2000 by CRC Press LLC
© 2000 by CRC Press LLC and that the phase detector output has a strong 60-kHz component. This example took 251 s on a Sun SPARC-2 workstation (3046 time steps, with an average of 5 Newton iterations per time step). Pitfalls. Occasionally SPICE will fail and give the message “Timestep too small in transient analysis”, which means that the process of Newton iterations at certain time steps could not be made to converge. One of the most common causes of this is the specification of a capacitor with a value that is much too large, for example, specifying a 1-F capacitor instead of a 1 pF capacitor (an easy mistake to make by not adding the “p” in the value specification). Unfortunately, we usually have no way to tell which capacitor is at fault from the type of failure generated other than to manually search the input deck. Other transient failures are caused by MOSFET models. Some models contain discontinuous capacitances (with respect to voltage) and others do not conserve charge. These models can vary from version to version so it is best to check the user’s guide. Process and Device Simulation Process and devices simulation are the steps that precede analog circuit simulation in the overall simulation flow (see Fig. 13.9). The simulators are also different in that they are not measurement driven as are analog circuit simulators. The input to a process simulator is the sequence of process steps performed (times, temperatures, gas concentrations) as well as the mask dimensions. The output from the process simulator is a detailed description of the solid-state device (doping profiles, oxide thickness, junction depths, etc.). The input to the device simulator is the detailed description generated by the process simulator (or via measurement). The output of the device simulator is the electrical characteristics of the device (IV curves, capacitances, switching transient curves). Process and device simulation are becoming increasingly important and widely used during the integrated circuit design process. A number of reasons exist for this: • As device dimensions shrink, second-order effects can become dominant. Modeling of these effects is difficult using analytical models. • Computers have greatly improved, allowing time-consuming calculations to be performed in a reasonable amount of time. • Simulation allows access to impossible to measure physical characteristics. • Analytic models are not available for certain devices, for example, thyristors, heterojunction devices and IGBTS. • Analytic models have not been developed for certain physical phenomena, for example, single event upset, hot electron aging effects, latchup, and snap-back. • Simulation runs can be used to replace split lot runs. As the cost to fabricate test devices increases, this advantage becomes more important. • Simulation can be used to help device, process, and circuit designers understand how their devices and processes work. Clearly, process and device simulation is a topic which can be and has been the topic of entire texts. The following sections attempt to provide an introduction to this type of simulation, give several examples showing what the simulations can accomplish, and provide references to additional sources of information. FIGURE 13.9 Data flow for complete process-device-circuit modeling