AVERLOGICAL422 Data Sheets(Revision V1.1)
AL422 Data Sheets (Revision V1.1)
AVERLOGICAL422Amendments (Since April 2,1999)05-13-99DC/AC characteristics (including current consumption)updated07-02-99Pinout diagram (5.0)and DC external load (7.4)modified08-03-99Description about TST pin added in sections 6.0& 8.1.09-02-998.3.2rewritten10-26-99Capacitance provided in the AC characteristics section12-15-99RemoveTSTpinrestriction01-18-011.Revised section“8.3.2Read Enable during Reset Cycles"to“8.3.2The ProperManipulationofFIFOAccess".2.Add section"8.3.3SingleField Write withMultipleRead Operation”3.Add section "8.3.4 One Field Delay Line (The Old Data Read)"2AL422BJanuary23,2001
AL422 AL422B January 23, 2001 2 Amendments (Since April 2, 1999) 05-13-99 DC/AC characteristics (including current consumption) updated. 07-02-99 Pinout diagram (5.0) and DC external load (7.4) modified. 08-03-99 Description about TST pin added in sections 6.0 & 8.1. 09-02-99 8.3.2 rewritten. 10-26-99 Capacitance provided in the AC characteristics section. 12-15-99 Remove TST pin restriction. 01-18-01 1. Revised section “8.3.2 Read Enable during Reset Cycles” to “8.3.2 The Proper Manipulation of FIFO Access”. 2. Add section “8.3.3 Single Field Write with Multiple Read Operation” 3. Add section “8.3.4 One Field Delay Line (The Old Data Read)
AVERLOGICAL422AL422 3M-Bits FIFOField MemoryContents:41.0Description42.0Features43.0Applications44.0 Ordering Information55.0 Pinout Diagram56.0 Pin Description67.0ElectricalCharacteristics67.1AbsoluteMaximumRatings67.2RecommendedOperatingConditions67.3DCCharacteristics77.4AC Characteristics97.5Timing Diagrams138.0 Functional Description148.1 Memory Operation158.25Vand3.3Vapplications168.3 Application Notes168.3.1 Irregular Read/Write178.3.2The Proper Manipulation of FIFOAccess178.3.3SingleField Write withMultipleRead Operation178.3.4OneFieldDelayLine(TheOldDataRead)199.0 Mechanical Drawing3AL422BJanuary 23,2001
AL422 AL422B January 23, 2001 3 AL422 3M-Bits FIFO Field Memory Contents: 1.0 Description _ 4 2.0 Features_ 4 3.0 Applications_ 4 4.0 Ordering Information_ 4 5.0 Pinout Diagram _ 5 6.0 Pin Description _ 5 7.0 Electrical Characteristics _ 6 7.1 Absolute Maximum Ratings _ 6 7.2 Recommended Operating Conditions _ 6 7.3 DC Characteristics _ 6 7.4 AC Characteristics _ 7 7.5 Timing Diagrams_ 9 8.0 Functional Description_ 13 8.1 Memory Operation _ 14 8.2 5V and 3.3V applications _ 15 8.3 Application Notes _ 16 8.3.1 Irregular Read/Write _ 16 8.3.2 The Proper Manipulation of FIFO Access _ 17 8.3.3 Single Field Write with Multiple Read Operation_ 17 8.3.4 One Field Delay Line (The Old Data Read) _ 17 9.0 Mechanical Drawing _ 19
AVERLOGICAL4221.0DescriptionThe AL422 consists of 3M-bits of DRAM, and is configured as 393,216 words x 8 bit FIFO (first infirst out).The interface is very user-friendly since all complicated DRAM operations are alreadymanaged by the internal DRAM controller.Currentsourcesofsimilarmemory(fieldmemory)inthemarketprovidelimitedmemorysizewhichis only enough for holding one TV field, but not enough to hold a whole PC video frame whichnormallycontains640x480or720x480bytes.TheAverLogicAL422provides50%morememoryto support high resolutionfor digital PC graphics orvideo applications.The50% increase in speedalso expands the range of applications.2.0 Features3.0Applications384K (393,216)x8bitsFIFOorganizationMultimedia systemsSupport VGA, CCIR, NTSC,PAL andVideo capture systemsHDTV resolutionsVideo editing systemsIndependentread/writeoperations(differentScan rate convertersI/O data rates acceptable)TV's picture in picture featureHigh speed asynchronous serial accessTimebasecorrection (TBC).Read/write cycle time:20ns-FramesynchronizerAccess time: 15nsDigital video cameraOutput enable control (data skipping)BufferforcommunicationssystemsSelf refresh5Vor3.3Vpower supplyStandard 28-pin SOP package4.0OrderingInformationPart numberPackagePower SupplyStatusAL422B28-pin plastic SOP+5/+3.3 voltShippingAL422V528-pin plastic SOP+5 voltReplaced by AL422BAL422V3+3.3 volt28-pin plastic SOPReplaced by AL422B4AL422BJanuary23,2001
AL422 AL422B January 23, 2001 4 1.0 Description The AL422 consists of 3M-bits of DRAM, and is configured as 393,216 words x 8 bit FIFO (first in first out). The interface is very user-friendly since all complicated DRAM operations are already managed by the internal DRAM controller. Current sources of similar memory (field memory) in the market provide limited memory size which is only enough for holding one TV field, but not enough to hold a whole PC video frame which normally contains 640x480 or 720x480 bytes. The AverLogic AL422 provides 50% more memory to support high resolution for digital PC graphics or video applications. The 50% increase in speed also expands the range of applications. 2.0 Features · 384K (393,216) x 8 bits FIFO organization · Support VGA, CCIR, NTSC, PAL and HDTV resolutions · Independent read/write operations (different I/O data rates acceptable) · High speed asynchronous serial access · Read/write cycle time: 20ns · Access time: 15ns · Output enable control (data skipping) · Self refresh · 5V or 3.3V power supply · Standard 28-pin SOP package 3.0 Applications · Multimedia systems · Video capture systems · Video editing systems · Scan rate converters · TV’s picture in picture feature · Time base correction (TBC) · Frame synchronizer · Digital video camera · Buffer for communications systems 4.0 Ordering Information Part number Package Power Supply Status AL422B 28-pin plastic SOP +5/+3.3 volt Shipping AL422V5 28-pin plastic SOP +5 volt Replaced by AL422B AL422V3 28-pin plastic SOP +3.3 volt Replaced by AL422B
AVERLOGICAL4225.0PinoutDiagramDO1DO2IREDO7DOODO3GNDIOE/RRSTRCKDECDO5DO6DO428272625242221118161523201917AVERLOGICAL422BxxxxxLot NumberXXXXDate CodeDIODI1DI2DI3WE GNDTSTMRSTWCKVDDDI4DI5DI6DI7AL422-04 422B pinout diagram6.0PinDescriptionPin #Pin nameI/O typeFunctionDI0~DI71~4, 11~14inputData input9InputWCKWrite clock5/WEInput (active low)Write enable8/WRSTInput (active low)Write resetDO0~DO715~18,25~28Output (tristate)Data output20RCKInputRead clock24/REInput (active low)Read enable21/RRSTInput (active low)Read reset22/OEOutput enableInput (active low)7TSTInputTest pin (pulled-down)*10VDD5Vor3.3V19DEC/VDDDecoupling cap inputGND6, 23Ground5AL422BJanuary23,2001
AL422 AL422B January 23, 2001 5 5.0 Pinout Diagram 6.0 Pin Description Pin name Pin # I/O type Function DI0~DI7 1~4, 11~14 input Data input WCK 9 Input Write clock /WE 5 Input (active low) Write enable /WRST 8 Input (active low) Write reset DO0~DO7 15~18, 25~28 Output (tristate) Data output RCK 20 Input Read clock /RE 24 Input (active low) Read enable /RRST 21 Input (active low) Read reset /OE 22 Input (active low) Output enable TST 7 Input Test pin (pulled-down)* VDD 10 5V or 3.3V DEC/VDD 19 Decoupling cap input GND 6, 23 Ground 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 DI0 DI1 DI2 DI3 /WE GND TST /WRST WCK VDD DI4 DI5 DI6 DI7 DO0 DO1 DO2 DO3 /RE GND /OE /RRST RCK DEC DO4 DO5 DO6 DO7 AL422-04 422B pinout diagram AVERLOGIC AL422B XXXXX XXXX Lot Number Date Code