BRANCH INSTRUCTIONS (I FORMAT) 1/2-beq $tl, $t2, offset-Read register operands-Compare operands-Use ALU, subtract and check Zero outputCalculatetarget address-Sign-extenddisplacement- Shift left 2 places (word displacement)AddtoPC+4-Alreadycalculatedbyinstructionfetch
▪beq $t1, $t2, offset ▪Read register operands ▪Compare operands ▪ Use ALU, subtract and check Zero output ▪Calculate target address ▪ Sign-extend displacement ▪ Shift left 2 places (word displacement) ▪ Add to PC + 4 ▪ Already calculated by instruction fetch
BRANCH INSTRUCTIONS 2/2PC+4frominstructiondatapathJustBranchre-routes>AddSumtargetwiresShiftleft2ReadALUoperationregister1InstructionReaddata1Readregister2TobranchALUZeroRegisterscontrollogicWriteregisterReaddata2WritedataRegWrite1632Sign-extendSign-bit wirereplicated
Just re-routes wires Sign-bit wire replicated
COMPOSINGTHEEEMENTSThedatapath doesan instruction in one clockcycle-Eachdatapathelement canonlydoonefunctionatatime.-Hence,we need separate instruction and data memories.-Usemultiplexers wherealternate data sources areusedfor differentinstructions
▪The data path does an instruction in one clock cycle. ▪ Each datapath element can only do one function at a time. ▪ Hence, we need separate instruction and data memories. ▪Use multiplexers where alternate data sources are used for different instructions