复旦大学：微电子工程教学资源（参考论文）A high linearity multi-band and gain adjustable channel-select filter for TV-tuner application

Vol.34,No.9 Journal of Semiconductors September 2013 A high linearity multi-band and gain adjustable channel-select filter for TV-tuner application Wang Xin(王心)，Cheng Tao(程涛)，Liu Jie(刘杰)，and Tang Zhangwen(唐长文) ASIC System State Key Laboratory,Fudan University,Shanghai 201203,China Abstract:This paper presents a channel-select filter that employs an active-RC bi-quad structure for TV-tuner application.A design method to optimize the IIP3 of the bi-quad is developed.Multi-band selection and gain adjustment are implemented using switching resistors in the resistor array and capacitors in the capacitor array. Q-factor degradation is compensated by a tuning segmented resistor.A feed-forward OTA with high gain and low third-order distortion is applied in the bi-quad to maximize linearity performance and minimize area by avoiding extra compensation capacitor use.An RC tuning circuit and DC offset cancellation circuit are designed to overcome the process variation and DC offset,respectively.The experimental results yield an in-band IIP3 of more than 31 dBm at 0 dB gain,a 54 dB gain range with 6 dB gain step,and a continuous frequency tuning range from 0.25 to 4 MHz.The in-band ripple is less than 1.4 dB at high gain mode,while the gain error and frequency tuning error are no more than 3.4%and 5%,respectively.The design,which is fabricated in a 0.18 um CMOS process,consumes 12.6 mW power at a 1.8 V supply and occupies 1.28 mm2 Key words:channel select filter,high linearity;gain adjustable;multi-band,TV tuner D0I:10.1088/1674-4926/34/9/095007 EEACC:1270E 1.Introduction power consumptions has not yet been discussed. In this paper,an optimization method maximizing the bi- Recently,increasing attention has been paid to direct con- quad IIP3 by choosing optimal parameters of passive compo- version receivers (DCRs)due to their low power,small area nents in the bi-quad is discussed in detail for filter design.The and insensitiveness of image problem[].It is shown that multi- band selection is completed not only using a resistor array, mode and multi-band DCR TV-tuner solutions are economical which could just realize discrete frequency selection,but also for applications2).In this architecture,a channel-select filter, using a binary capacitor array,which is economical for realiz- which could select the wanted channels and filter out unwanted ing continuous frequency tuning.An on-chip auto-RC calibra- adjacent-channel interference,is needed.There are two impor- tion circuit is designed to ensure an accurate cutoff frequency tant issues in DCRs that could be harmful to base-band cir- under RC variation cuits3).The first is DC offset due to the self-mixing of the Unlike the traditional structure that uses a programmable mixer and other DC offset sources in the base band,such as gain amplifier(PGA)with a large gain range before the chan- the op-amp offset.The second is the 1/f noise.The most chal- nel select filter to cover the variation in base-band input signal lenging aspect for the design of channel-select filters in the base strength,a gain variable filter with a large gain range and small band is the high linearity requirement due to the large range gain error is proposed in this paper.The benefit of this system is variation in the desired signal strength and the strong out-of- that the optimization of IIP3 and noise can be considered at the band interference,which could destroy the performance of the same time to maximize the SFDR of the base-band circuit.In filter.So,a channel-select filter with DC offset cancellation, the final stage of the signal path,a post-PGA,which functions low noise,high in-band IIP3,as well as out-of-band IIP3 and as an output buffer,is used to realize fine gain adjustment. multiple band selection,is needed for multi-standard TV-tuner applications.An active-RC filter is usually hired due to its high linearity performance[4.5]. 2.System design considerations The Volterra series is usually used to analyze the linear- ity performance of a memory systeml6].But multi-feedback, 2.1.The filter structure which is commonly used in filter design,is not convenient and In a DCR system,the channel-select filter is actually a low- efficient for analysis using a signal flow graph(SFG).To sim- pass filter.The trade-off between power and adjacent rejection plify linearity analysis using the Volterra series,References[7, determines the order of the filter.An elliptic filter is chosen to ]discussed a new approach that treats multiple feedback loops meet the stringent rejection specification,as this type always as a two-port network by introducing three new network trans- provides a larger roll-off rate and moderate group delay at the fer functions.The scaling down technique was introduced to same order compared to other types of filter. deal with the trade-off between the dynamic range or SFDR A Tow-Thomas II bi-quad is chosen as the building block performance and power consumption.But the optimal para- of this active RC filter to realize high linearity performance meter determination of components in the filter under certain and orthogonal adjustment on the DC gain,cutoff frequency Corresponding author.Email:zwtang54@fudan.edu.cn Received 26 February 2013,revised manuscript received 3 April 2013 2013 Chinese Institute of Electronics 095007-1

Vol. 34, No. 9 Journal of Semiconductors September 2013 A high linearity multi-band and gain adjustable channel-select filter for TV-tuner application Wang Xin(王心), Cheng Tao(程涛), Liu Jie(刘杰), and Tang Zhangwen(唐长文) Ž ASIC & System State Key Laboratory, Fudan University, Shanghai 201203, China Abstract: This paper presents a channel-select filter that employs an active-RC bi-quad structure for TV-tuner application. A design method to optimize the IIP3 of the bi-quad is developed. Multi-band selection and gain adjustment are implemented using switching resistors in the resistor array and capacitors in the capacitor array. Q-factor degradation is compensated by a tuning segmented resistor. A feed-forward OTA with high gain and low third-order distortion is applied in the bi-quad to maximize linearity performance and minimize area by avoiding extra compensation capacitor use. An RC tuning circuit and DC offset cancellation circuit are designed to overcome the process variation and DC offset, respectively. The experimental results yield an in-band IIP3 of more than 31 dBm at 0 dB gain, a 54 dB gain range with 6 dB gain step, and a continuous frequency tuning range from 0.25 to 4 MHz. The in-band ripple is less than 1.4 dB at high gain mode, while the gain error and frequency tuning error are no more than 3.4% and 5%, respectively. The design, which is fabricated in a 0.18 m CMOS process, consumes 12.6 mW power at a 1.8 V supply and occupies 1.28 mm2 . Key words: channel select filter; high linearity; gain adjustable; multi-band; TV tuner DOI: 10.1088/1674-4926/34/9/095007 EEACC: 1270E 1. Introduction Recently, increasing attention has been paid to direct con￾version receivers (DCRs) due to their low power, small area and insensitiveness of image problemŒ1. It is shown that multi￾mode and multi-band DCR TV-tuner solutions are economical for applicationsŒ2. In this architecture, a channel-select filter, which could select the wanted channels and filter out unwanted adjacent-channel interference, is needed. There are two impor￾tant issues in DCRs that could be harmful to base-band cir￾cuitsŒ3. The first is DC offset due to the self-mixing of the mixer and other DC offset sources in the base band, such as the op-amp offset. The second is the 1/f noise. The most chal￾lenging aspect for the design of channel-select filters in the base band is the high linearity requirement due to the large range variation in the desired signal strength and the strong out-of￾band interference, which could destroy the performance of the filter. So, a channel-select filter with DC offset cancellation, low noise, high in-band IIP3, as well as out-of-band IIP3 and multiple band selection, is needed for multi-standard TV-tuner applications. An active-RC filter is usually hired due to its high linearity performanceŒ4; 5 . The Volterra series is usually used to analyze the linear￾ity performance of a memory systemŒ6. But multi-feedback, which is commonly used in filter design, is not convenient and efficient for analysis using a signal flow graph (SFG). To sim￾plify linearity analysis using the Volterra series, References [7, 8] discussed a new approach that treats multiple feedback loops as a two-port network by introducing three new network trans￾fer functions. The scaling down technique was introduced to deal with the trade-off between the dynamic range or SFDR performance and power consumption. But the optimal para￾meter determination of components in the filter under certain power consumptions has not yet been discussed. In this paper, an optimization method maximizing the bi￾quad IIP3 by choosing optimal parameters of passive compo￾nents in the bi-quad is discussed in detail for filter design. The band selection is completed not only using a resistor array, which could just realize discrete frequency selection, but also using a binary capacitor array, which is economical for realiz￾ing continuous frequency tuning. An on-chip auto-RC calibra￾tion circuit is designed to ensure an accurate cutoff frequency under RC variation. Unlike the traditional structure that uses a programmable gain amplifier (PGA) with a large gain range before the chan￾nel select filter to cover the variation in base-band input signal strength, a gain variable filter with a large gain range and small gain error is proposed in this paper. The benefit of this system is that the optimization of IIP3 and noise can be considered at the same time to maximize the SFDR of the base-band circuit. In the final stage of the signal path, a post-PGA, which functions as an output buffer, is used to realize fine gain adjustment. 2. System design considerations 2.1. The filter structure In a DCR system, the channel-select filter is actually a low￾pass filter. The trade-off between power and adjacent rejection determines the order of the filter. An elliptic filter is chosen to meet the stringent rejection specification, as this type always provides a larger roll-off rate and moderate group delay at the same order compared to other types of filterŒ9 . A Tow-Thomas II bi-quad is chosen as the building block of this active RC filter to realize high linearity performance and orthogonal adjustment on the DC gain, cutoff frequency † Corresponding author. Email: zwtang54@fudan.edu.cn Received 26 February 2013, revised manuscript received 3 April 2013 © 2013 Chinese Institute of Electronics 095007-1

J.Semicond.2013,34(9) Wang Xin et al. DCOC DCOC DCOC G=0-54dB G=0-18dB G=0-18dB G=0-18dB Q=0.61 0=1.45 0=5.04 。=0.2-4MHz Biquad 1 Biquad 2 Biquad 3 Fig.1.The filter structure including DCOC R 1+2 Hs)=H。 w C 品 1+-5 vinp von -vop o-RRCC: R w-RRCC. R S3 S2 000000- R R Fig.2.The Tow-Thomas bi-quad structure and O factor.Figure I shows the structure of the filter,includ- the main cause of distortion in the bi-quad is the nonlinearity ing the DC offset cancellation(DCOC)loop at each stage.A of OTAs.As will be shown below,the IIP3 and DC gain of the six order filter is realized by cascading three bi-quads together. OTA determines the IIP3 of the bi-quad.The feedback path Each stage has an 18 dB gain range and the cutoff frequency could also have an impact on the linearity performance.The is tunable.So the filter has a 54 dB gain range in total.Fig- Volterra series is usually used to analyze the linearity perfor- ure 2 shows a detailed schematic of a single bi-quad.All the mance ofa memory system,but it is cumbersome to simplify resistor arrays and capacitor arrays are tunable.A classic net- multiple feedback paths using SFG.In Refs.[7,8],another use- work analysis of the bi-quad reveals the gain,cutoff frequency ful analysis method was introduced and exemplified,but the and O factor,which could change by adjusting Re,Ra and Rd, discussions were mainly restricted to the scaling technique, respectively.To maximize the in-band linearity performance, which needs to scale all the elements using different scaling high-O poles are assigned to the nearby zeros instead of re- factors at the same time.In this paper,employing a similar ap- mote zeros.Figure 3 shows the pole-zero pairing scheme.This proach,a procedure which is used in this design to maximize kind of pole-zero pairing could minimize the amplitude peak the IIIP3 of the bi-quad by normalizing all the passive element of high-O poles near the cutoff frequency.The bi-quads are parameters to a reference resistance and capacitance when the ordered as the O-factor gradually increases to maximize the IIP3 and DC gain of the OTA are fixed is developed. in-band IIP3. Because of balance structure use,the second-order dis- tortion of the bi-quad could be ignored.As shown in Fig.4, 2.2.IIP3 optimization two different kinds of transfer functions,which have been ex- Since passive resistors and capacitors can be very linear, plained in Ref.[8],are used.Hoi is the transfer function from 095007-2

J. Semicond. 2013, 34(9) Wang Xin et al. Fig. 1. The filter structure including DCOC. Fig. 2. The Tow-Thomas bi-quad structure. and Q factor. Figure 1 shows the structure of the filter, includ￾ing the DC offset cancellation (DCOC) loop at each stage. A six order filter is realized by cascading three bi-quads together. Each stage has an 18 dB gain range and the cutoff frequency is tunable. So the filter has a 54 dB gain range in total. Fig￾ure 2 shows a detailed schematic of a single bi-quad. All the resistor arrays and capacitor arrays are tunable. A classic net￾work analysis of the bi-quad reveals the gain, cutoff frequency and Q factor, which could change by adjusting Rc, Ra and Rd, respectively. To maximize the in-band linearity performance, high-Q poles are assigned to the nearby zeros instead of re￾mote zeros. Figure 3 shows the pole-zero pairing scheme. This kind of pole-zero pairing could minimize the amplitude peak of high-Q poles near the cutoff frequency. The bi-quads are ordered as the Q-factor gradually increases to maximize the in-band IIP3. 2.2. IIP3 optimization Since passive resistors and capacitors can be very linear, the main cause of distortion in the bi-quad is the nonlinearity of OTAs. As will be shown below, the IIP3 and DC gain of the OTA determines the IIP3 of the bi-quad. The feedback path could also have an impact on the linearity performance. The Volterra series is usually used to analyze the linearity perfor￾mance of a memory systemŒ6, but it is cumbersome to simplify multiple feedback paths using SFG. In Refs. [7, 8], another use￾ful analysis method was introduced and exemplified, but the discussions were mainly restricted to the scaling technique, which needs to scale all the elements using different scaling factors at the same time. In this paper, employing a similar ap￾proach, a procedure which is used in this design to maximize the IIIP3 of the bi-quad by normalizing all the passive element parameters to a reference resistance and capacitance when the IIP3 and DC gain of the OTA are fixed is developed. Because of balance structure use, the second-order dis￾tortion of the bi-quad could be ignored. As shown in Fig. 4, two different kinds of transfer functions, which have been ex￾plained in Ref. [8], are used. H0j is the transfer function from 095007-2

J.Semicond.2013,34(9) Wang Xin et al. 1000 p-z of biquad3 600 p-z of biquad2 1,g +8 200 复 p-z of biquadl Feedback -200 network Nearby zero *8 -600 1,3 Remote zero *0 -100 80 -60 -40 -20 0 20 Real part (MHz) Fig.4.The distortion analysis model. Fig.3.Pole and zero pairing. the input of the bi-quad to the output of jth OTA,while Foi is Rd= (5) the transfer function from the input of jth OTA to the output of WpC the bi-quad.In Fig.4,the two-tone input and distortion impact So IIP3 could be expressed like of each OTA are shown.The total third-order intermodulation distortion(IMD3)product of the output is the sum of two dis- tortion outputs from each OTA.This could be expressed like IIP3= V1P3,oTA× 唱 Ho IMD3= —(H61Fo1+H2Fo2). VIP3.OTA (1) ai where ViP3,oTA is the IIP3 of OTA,and is the linear gain of (1+Ho)+QopCRa+1 OTA.IIP3 can be expressed as R (6) IIP3 VuP3.OTA Hoa (2) Ho1 Fo1+Ho2 Fo2 This tells us that the IIP3 of the bi-quad could be improved by increasing the IIP3 of OTA,and the high gain of the fil- Ho1,Ho2,Fo1,Fo2 are calculated using typical network ter means a low IIP3.Suppose OTA has maximum IIP3 and circuit analysis.If we focus on the in-band IIP3,to simplify enough high DC gain at certain power consumption.The IIP3 analysis,p is a reasonable assumption.In this case, of the filter could be improved further by optimizing the feed- back loops,which means choosing proper passive element Ho1≈H0R b Ho2≈Ho, parameters in the feedback network.For a fixed C,if we set Fo1≈1+Ho, F2≈1+ Rb Ra=(3+3Ho)/41 @pOc (7) Substitute these expressions into Eq.(7),and we get maximum IIP3 could be reached.But the optimal value could change if the filter operates under different gain modes.We focus on the low gain mode because the input signal strength IIP3 ViIP3,OTA a ⊙ (3) is typically strong at this mode.In this case,Ho equals 1.Thus, R Ra Ra,p3≈1.57/op0C. (1+Ho)+ +1 Rb Whether Ra could equal this value depends on other spec- ifications.To found out the limitation on Ra,the noise charac- Once the filter has been designed on a system level,all the teristic also needs to be analyzed.The noise analysis model is parameters like p,Q are fixed.This means that the product shown in Fig.5.Rn is the equivalent input noise resistor of the of Ra,Rp,Ci and C2 is constant.The minimum area of the OTA.The total output noise of the bi-quad is capacitors and resistors is achieved when Ra is equal to Rp and Ci equal to C2.For simplifying the analysis,we set C1= C2=C.Using filter parameter expressions,Ro and Ra could be normalized to Ra and C,and expressed as ≈4kTR(2++QCR 1 Rb= RawC2' (4) +++(合+门 095007-3

J. Semicond. 2013, 34(9) Wang Xin et al. Fig. 3. Pole and zero pairing. the input of the bi-quad to the output of j th OTA, while F0j is the transfer function from the input of j th OTA to the output of the bi-quad. In Fig. 4, the two-tone input and distortion impact of each OTA are shown. The total third-order intermodulation distortion (IMD3) product of the output is the sum of two dis￾tortion outputs from each OTA. This could be expressed like IMD3 D v 3 in ˛ 3 1V 2 IIP3; OTA ￾ H3 01F01 C H3 02F02
; (1) where VIIP3; OTA is the IIP3 of OTA, and ˛1 is the linear gain of OTA. IIP3 can be expressed as IIP3 D VIIP3; OTAs H0˛ 3 1 H3 01F01 C H3 02F02 : (2) H01, H02, F01, F02 are calculated using typical network circuit analysis. If we focus on the in-band IIP3, to simplify analysis, !  !p is a reasonable assumption. In this case, H01  H0 Rb Rd ; H02  H0; F01  1 C H0; F02  1 C Rd Rb : Substitute these expressions into Eq. (7), and we get IIP3 D VIIP3; OTA H0 vuuuut ˛ 3 1  Rb Rd 3 .1 C H0/ C Rd Rb C 1 : (3) Once the filter has been designed on a system level, all the parameters like !p, Q are fixed. This means that the product of Ra, Rb, C1 and C2 is constant. The minimum area of the capacitors and resistors is achieved when Ra is equal to Rb and C1 equal to C2. For simplifying the analysis, we set C1 D C2 D C. Using filter parameter expressions, Rb and Rd could be normalized to Ra and C, and expressed as Rb D 1 Ra!2 pC2 ; (4) Fig. 4. The distortion analysis model. Rd D Q !pC : (5) So IIP3 could be expressed like IIP3 D VIIP3; OTA H0 vuuuut ˛ 3 1  1 Q!pC 3  1 Ra 3 .1 C H0/ C Q!pCRa C 1 : (6) This tells us that the IIP3 of the bi-quad could be improved by increasing the IIP3 of OTA, and the high gain of the fil￾ter means a low IIP3. Suppose OTA has maximum IIP3 and enough high DC gain at certain power consumption. The IIP3 of the filter could be improved further by optimizing the feed￾back loops, which means choosing proper passive element parameters in the feedback network. For a fixed C, if we set Ra D .3 C 3H0/ 1=4 1 !pQC ; (7) maximum IIP3 could be reached. But the optimal value could change if the filter operates under different gain modes. We focus on the low gain mode because the input signal strength is typically strong at this mode. In this case, H0 equals 1. Thus, Ra; IIP3  1:57=!pQC. Whether Ra could equal this value depends on other spec￾ifications. To found out the limitation on Ra, the noise charac￾teristic also needs to be analyzed. The noise analysis model is shown in Fig. 5. Rn is the equivalent input noise resistor of the OTA. The total output noise of the bi-quad is V 2 n; out  4kTRa  2 C H0 C 1 Q!pCRa  C 4kTRn " .1 C H0/ 2 C  1 Q C !pRaC 2 # : (8) 095007-3

J.Semicond.2013,34(9) Wang Xin et al. R R =4KTR Fig.5.The noise analysis model 60 60 IIP3 @0 dB+ 50 20 IIP3 18dB+ 40 NF @0dB 30 -20 Frequency range -40 NF 18 dB 20 Fig.7.The band selection and frequency tuning scheme. 60 10 102 10 10 10 109 ferent cutoff frequencies.So,by switching resistors in the re- R(2) sistor array,the bandwidth of the filter could change from one to another.The first flaw in this method is that the number of Fig.6.The optimization of IIP3 and NF trade-off. bands is restricted by the number of resistors in the array,and the second is that it can only realize discrete frequency tuning. According to the definition of noise figure in Ref.[10],we get By adding a capacitor array as shown in Fig.7,a mixed ap- proach is employed in this design.The resistor array is used to NF=1+ select a center frequency,and by increasing or decreasing the 4kTRs number of unit capacitors in the capacitor array,the cutoff fre- quency could change around the center frequency.Thus,the ≈1+ 2+H0+ cutoff frequency of the filter is continuously adjustable.This RsHo QopCRa step is determined by the capacitance of the unit capacitor in the capacitor array.To maintain an elliptic frequency response (1+Ho)2+ (9) shape,Ro,Re,Rd,and Cz should change at the same time ac- RsHo +@pR.C cording to Ra and C. Three indications are conveyed in this expression:(1)the noise Accuracy gain is desired to ensure that the auto gain con- contribution of Ra is individually decided by the filter and ca- trol (AGC)loop is working correctly.As analyzed before,the pacitance parameters;(2)Re contributes more noise at high gain of the bi-quad is determined by the ratio of the two re- gain mode;and (3)the OTA noise could be dominant if its input sistors.Re is chosen to change the gain of the bi-quad due to equivalent noise is large enough. Re having no influence on the cutoff frequency.As shown in To show the trade-off between IIP3 and NF.Figure 6 plots Fig.2.R.is a resistor array with segmented resistors.The array the relationship of NF and IIP3 with Ra.C could be chosen operates synchronously with the switching of Ra to maintain an under chip area consideration.In this example,we set C= elliptic filter frequency response,while segmented resistors are 3 pF.As is shown in the graph,the range of resistor values is used to change the gain of the bi-quad.Figure 8 shows the SFG determined by the specification of IIP3 at low gain and NF at of the bi-quad with a non-ideal integrator model.A(j@)is the high gain.If we choose Ra at the right side of the optimal value, open loop gain of OTA.Using SFG analysis,a more accurate IIP3 could be less sensitive to the variation in Ra.but the noise expression of the bi-quad transfer function is given as will be higher because of the larger value of Ra.Below the optimal value of Ra.IIP3 changes dramatically with Ra while 1+5 s2 十 the NF curve is relatively flat. H6)=Ar“a2aT 1+5 2 (10) 3.Circuit design 0.+ag 3.1.Band selection and gain adjustment Subscriptr indicates the effective filter parameter differing Since the cutoff frequency is determined by the RC prod- from the ideal one.As explained in Ref.[9],gain and O are uct,if C remains constant,then different resistors refer to dif- more dependent on A(j).The ratio of effective gain and O 095007-4

J. Semicond. 2013, 34(9) Wang Xin et al. Fig. 5. The noise analysis model. Fig. 6. The optimization of IIP3 and NF trade-off. According to the definition of noise figure in Ref. [10], we get NF D 1 C V 2 n;in 4kTRs  1 C Ra RsH2 0  2 C H0 C 1 Q!pCRa  C Rn RsH2 0 " .1 C H0/ 2 C  1 Q C !pRaC 2 # : (9) Three indications are conveyed in this expression: (1) the noise contribution of Rd is individually decided by the filter and ca￾pacitance parameters; (2) Rc contributes more noise at high gain mode; and (3) the OTA noise could be dominant if its input equivalent noise is large enough. To show the trade-off between IIP3 and NF, Figure 6 plots the relationship of NF and IIP3 with Ra. C could be chosen under chip area consideration. In this example, we set C D 3 pF. As is shown in the graph, the range of resistor values is determined by the specification of IIP3 at low gain and NF at high gain. If we choose Ra at the right side of the optimal value, IIP3 could be less sensitive to the variation in Ra, but the noise will be higher because of the larger value of Ra. Below the optimal value of Ra, IIP3 changes dramatically with Ra while the NF curve is relatively flat. 3. Circuit design 3.1. Band selection and gain adjustment Since the cutoff frequency is determined by the RC prod￾uct, if C remains constant, then different resistors refer to dif￾Fig. 7. The band selection and frequency tuning scheme. ferent cutoff frequencies. So, by switching resistors in the re￾sistor array, the bandwidth of the filter could change from one to another. The first flaw in this method is that the number of bands is restricted by the number of resistors in the array, and the second is that it can only realize discrete frequency tuning. By adding a capacitor array as shown in Fig. 7, a mixed ap￾proach is employed in this design. The resistor array is used to select a center frequency, and by increasing or decreasing the number of unit capacitors in the capacitor array, the cutoff fre￾quency could change around the center frequency. Thus, the cutoff frequency of the filter is continuously adjustable. This step is determined by the capacitance of the unit capacitor in the capacitor array. To maintain an elliptic frequency response shape, Rb, Rc, Rd, and Cz should change at the same time ac￾cording to Ra and C. Accuracy gain is desired to ensure that the auto gain con￾trol (AGC) loop is working correctly. As analyzed before, the gain of the bi-quad is determined by the ratio of the two re￾sistors. Rc is chosen to change the gain of the bi-quad due to Rc having no influence on the cutoff frequency. As shown in Fig. 2, Rc is a resistor array with segmented resistors. The array operates synchronously with the switching of Ra to maintain an elliptic filter frequency response, while segmented resistors are used to change the gain of the bi-quad. Figure 8 shows the SFG of the bi-quad with a non-ideal integrator model. A(j!/ is the open loop gain of OTA. Using SFG analysis, a more accurate expression of the bi-quad transfer function is given as Hr .s/ D H0r 1 C s !zrQzr C s 2 !2 zr 1 C s !prQr C s 2 !2 pr : (10) Subscript r indicates the effective filter parameter differing from the ideal one. As explained in Ref. [9], gain and Q are more dependent on A(j!/. The ratio of effective gain and Q 095007-4

J.Semicond.2013,34(9) Wang Xin et al. R Input stage IFeedforward stagel Output stage R.C.s Local CMFB · 2-13 vop T+9 Ts+92 R M4 M5 16 M8 M9 9,=-0RC 9,=-3C M3 T=RC TRC2 A(jo) A(j@) Fig.8.The SFG of the bi-quad with a non-ideal integrator model Fig.10.Schematic of the feed-forward OTA. S3 An accurate 6 dB gain step should be achieved if the value of the effective Re also has a binary property.But in Fig.9(a), no matter what sizes of transistors are used.it is impossible to S2 4WL丁 realize a binary effective Re because of non-symmetry.On the contrary,by adding an additional switch and properly sizing, which is shown in Fig.9(b),an effective Re could have a bi- 2WL nary property.Thus,the gain of the bi-quad has a slight error 8WIL because the two effective resistances have a good match. As the conclusion of non-ideal SFG analysis indicated,the 2R 4R phenomenon ofnon-ideal OTA deteriorates the O-factor due to (a) the finite gain and bandwidth product(GBW).A high-O could cause a large ripple in the pass band ofthe filter which is not S3 desired.In high gain mode especially,the GBW is reduced due to heavy load.Noticing that the O-factor is actually the ratio of I w S2 two resistors that hardly vary,a reduced Ra at high gain mode 3L丁E could reduce the effective O,which in turn compensates for the degradation due to finite GBW.So the resistors are constructed I W 7L丁王 by segmented resistors in the array of Rd as shown in Fig.2. By shorting or connecting segmented resistors,the effective 5L丁 Ra could change according to the gain mode of the bi-quad. ·MM◆ The control code of this Q-tuning element comes from the gain R 2R 4R control code.So no additional decoding circuit is needed. (b) 3.2.Feed-forward OTA Fig.9.The match scheme for small gain error.(a)The traditional method.(b)The proposed method. OTA is the most important element in active RC filters.As explained before,an OTA with high gain,low noise and high are approximately expressed as linearity is needed.This is not only beneficial for improving IIP3 and gain accuracy,but also for lowering band ripple. Hor 1 (11) To reduce the total area of the filter,the use of extra ca- H01- pacitors such as Miller compensation capacitors and compen- OwpA(jo) sation capacitors for common mode feedback stability should be avoided in this design.A feed-forward OTA,which was in- 1 0 (12) troduced in Ref.[11],is applied.The schematic of this kind 1-2Ho0- of OTA is shown in Fig.10.Instead of pushing the dominant pA(j@) pole to a lower frequency,it creates a zero on the left plane It is shown that only if the gain ofOTA is large enough,can in the s domain,which is beneficial for the phase margin and the gain of the bi-quad be treated as the ratio of the resistors. high bandwidth at low power.Local common mode feedback is Thus,when the OTA has sufficient gain,the gain accuracy of completed using resistors as shown in the figure,and the OTA the bi-quad is decided only by the match between the two re- gain is limited by them.In Ref.[12],the low distortion benefit sistors.Figure 9(a)shows a traditional segmented resistor with of this feed-forward OTA was discussed in detail by simula- MOS transistors operating as switches.The MOS transistor can tion.In this part,the theoretical analysis of distortion will be be treated as a resistor when it operates in the linear region. discussed in detail.The Volterra series is used again here to Thus,the gain should be the ratio between two equivalent re- analyze the IIP3 of this OTA. sistances which include the output resistances of the transis- Figure 11 shows a differential pair of NMOS transistors. tors.For a fixed band,the value of equivalent Ra is constant. We use the model taking mobility degradation into account.id, 095007-5

J. Semicond. 2013, 34(9) Wang Xin et al. Fig. 8. The SFG of the bi-quad with a non-ideal integrator model. Fig. 9. The match scheme for small gain error. (a) The traditional method. (b) The proposed method. are approximately expressed as H0r H0  1 1 ￾ ! Q!pA .j!/ ; (11) Qr Q  1 1 ￾ 2H0Q ! !pA .j!/ : (12) It is shown that only if the gain of OTA is large enough, can the gain of the bi-quad be treated as the ratio of the resistors. Thus, when the OTA has sufficient gain, the gain accuracy of the bi-quad is decided only by the match between the two re￾sistors. Figure 9(a) shows a traditional segmented resistor with MOS transistors operating as switches. The MOS transistor can be treated as a resistor when it operates in the linear region. Thus, the gain should be the ratio between two equivalent re￾sistances which include the output resistances of the transis￾tors. For a fixed band, the value of equivalent Ra is constant. Fig. 10. Schematic of the feed-forward OTA. An accurate 6 dB gain step should be achieved if the value of the effective Rc also has a binary property. But in Fig. 9(a), no matter what sizes of transistors are used, it is impossible to realize a binary effective Rc because of non-symmetry. On the contrary, by adding an additional switch and properly sizing, which is shown in Fig. 9(b), an effective Rc could have a bi￾nary property. Thus, the gain of the bi-quad has a slight error because the two effective resistances have a good match. As the conclusion of non-ideal SFG analysis indicated, the phenomenon of non-ideal OTA deteriorates the Q-factor due to the finite gain and bandwidth product (GBW). A high-Q could cause a large ripple in the pass band of the filterŒ10, which is not desired. In high gain mode especially, the GBW is reduced due to heavy load. Noticing that the Q-factor is actually the ratio of two resistors that hardly vary, a reduced Rd at high gain mode could reduce the effective Q, which in turn compensates for the degradation due to finite GBW. So the resistors are constructed by segmented resistors in the array of Rd as shown in Fig. 2. By shorting or connecting segmented resistors, the effective Rd could change according to the gain mode of the bi-quad. The control code of this Q-tuning element comes from the gain control code. So no additional decoding circuit is needed. 3.2. Feed-forward OTA OTA is the most important element in active RC filters. As explained before, an OTA with high gain, low noise and high linearity is needed. This is not only beneficial for improving IIP3 and gain accuracy, but also for lowering band ripple. To reduce the total area of the filter, the use of extra ca￾pacitors such as Miller compensation capacitors and compen￾sation capacitors for common mode feedback stability should be avoided in this design. A feed-forward OTA, which was in￾troduced in Ref. [11], is applied. The schematic of this kind of OTA is shown in Fig. 10. Instead of pushing the dominant pole to a lower frequency, it creates a zero on the left plane in the s domain, which is beneficial for the phase margin and high bandwidth at low power. Local common mode feedback is completed using resistors as shown in the figure, and the OTA gain is limited by them. In Ref. [12], the low distortion benefit of this feed-forward OTA was discussed in detail by simula￾tion. In this part, the theoretical analysis of distortion will be discussed in detail. The Volterra series is used again here to analyze the IIP3 of this OTA. Figure 11 shows a differential pair of NMOS transistors. We use the model taking mobility degradation into account. id, 095007-5