LogP Model design strongly influenced by trends in parallel computer design Model of a distributed memory multiprocessor Processors communicate via point to point messages Attempts to capture important bottleneck of parallel machines 21
LogP • Model design strongly influenced by trends in parallel computer design • Model of a distributed memory multiprocessor • Processors communicate via point to point messages • Attempts to capture important bottleneck of parallel machines 21
LogP Specifies performance characteristics of communication network Provide incentive for clever data placement Illustrates importance of balanced communication
LogP • Specifies performance characteristics of communication network. – Provide incentive for clever data placement – Illustrates importance of balanced communication 22
Parallel machine trends Machine organization for most parallel machines is similar A collection of complete computers ° Microprocessor Cache memory Sizable dRam memory Connected by robust communications network No single programming methodology is dominant 23
Parallel Machine Trends • Machine organization for most parallel machines is similar – A collection of complete computers • Microprocessor • Cache memory • Sizable DRAM memory – Connected by robust communications network • No single programming methodology is dominant 23
Other considerations · Processor count Number of nodes relative to price of most expensive supercomputer / cost of node Communication Interval lags far behind processor memory bandwidth Presence of adaptive routing and fault-recovery networking systems Affects algorithm design Parallel algorithms developed with large number of data elements per processor Attempts to exploit network topology or processor count is not very robust 24
Other considerations • Processor Count – Number of nodes relative to • price of most expensive supercomputer / cost of node • Communication Interval lags far behind processor memory bandwidth • Presence of adaptive routing and fault-recovery networking systems • Affects algorithm design – Parallel algorithms developed with large number of data elements per processor – Attempts to exploit network topology or processor count is not very robust 24
Model parameters Latency Delay incurred in communicating a message from source to destination Hop count and Hop delay Communication Overhead o) Length of time a processor is engaged in sending or receIving a message Node overhead for processing a send or receive Communication bandwidth(g) Minimum time interval between messages ● Processor count(P) Processor count
Model Parameters • Latency (L) – Delay incurred in communicating a message from source to destination • Hop count and Hop delay • Communication Overhead (o) – Length of time a processor is engaged in sending or receiving a message • Node overhead for processing a send or receive • Communication bandwidth (g) – Minimum time interval between messages • Processor count (P) – Processor count 25