Paging( 3) 1o0ooooo oo口o physical addres (24580) 150000 140001 11[11 10o001 000|0 12-bit offset copied directly from input to output 011 1001 001 1 o010 Present/ Virtual page= 2 is used as an index into the page table Incoming virtual 0010000ooooolol1ojo address (8196) Figure 3-10. The internal operation of the mmu with 16 4-KB pages Tanenbaum, Modern Operating Systems 3e, (c)2008 Prentice-Hall, Inc. All rights reserved. 0-13-6006639
Figure 3-10. The internal operation of the MMU with 16 4-KB pages. Paging (3) Tanenbaum, Modern Operating Systems 3 e, (c) 2008 Prentice-Hall, Inc. All rights reserved. 0-13-6006639
Page tables Virtual addresses mapping a Virtual address split into virtual page number and offset a 16-bit address: 4KB page size; 16 pages a virtual page number index to the page table a Purpose of page table Map virtual pages onto page frames
Page tables ◼ Virtual addresses mapping ❑ Virtual address split into virtual page number and offset ❑ 16-bit address: 4KB page size; 16 pages ❑ Virtual page number: index to the page table ❑ Purpose of page table ◼ Map virtual pages onto page frames
Structure of Page Table Entry Caching disabled Modified Present/absent Page frame number Referenced Protection Figure 3-11. a typical page table entry Tanenbaum, Modern Operating Systems 3 e, (c)2008 Prentice-Hall, Inc. All rights reserved. 0-13-6006639
Figure 3-11. A typical page table entry. Structure of Page Table Entry Tanenbaum, Modern Operating Systems 3 e, (c) 2008 Prentice-Hall, Inc. All rights reserved. 0-13-6006639
Page Table structure Protection a What kinds of access are permitted Modified When a page is written to (dirty) Referenced When a page is referenced Cache disabling a Data inconsistency
Page Table Structure ◼ Protection ❑ What kinds of access are permitted ◼ Modified: ❑ When a page is written to (dirty) ◼ Referenced: ❑ When a page is referenced ◼ Cache disabling ❑ Data inconsistency
Speeding Up Paging Paging implementation issues The mapping from virtual address to physical address must be fast If the virtual address space is large, the page table will be large. (32bit/64bit) Every process should have its own page table in memory Tanenbaum, Modern Operating Systems 3 e, (c)2008 Prentice-Hall, Inc. All rights reserved. 0-13-6006639
Paging implementation issues: • The mapping from virtual address to physical address must be fast. • If the virtual address space is large, the page table will be large. (32bit/64bit) • Every process should have its own page table in memory Speeding Up Paging Tanenbaum, Modern Operating Systems 3 e, (c) 2008 Prentice-Hall, Inc. All rights reserved. 0-13-6006639